设置可高度的Relase版本，不然Usb没法枚举，Debug速度太慢
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zqm
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pub(crate) const FILTER_MAX: log_04::LevelFilter = log_04::LevelFilter::Off; pub(crate) fn is_enabled(_level: log_04::Level, _target: &str) -> bool { true }
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|
||||
D:\Projects\trunk\JoyD\ESP32\my_usb_project\rust_app\target\release-debug\build\esp-rom-sys-2c7774de66b7323f\build_script_build-2c7774de66b7323f.d: D:\DiskC\ProgramData\Cargo\registry\src\index.crates.io-1949cf8c6b5b557f\esp-rom-sys-0.1.3\build.rs
|
||||
|
||||
D:\Projects\trunk\JoyD\ESP32\my_usb_project\rust_app\target\release-debug\build\esp-rom-sys-2c7774de66b7323f\build_script_build-2c7774de66b7323f.exe: D:\DiskC\ProgramData\Cargo\registry\src\index.crates.io-1949cf8c6b5b557f\esp-rom-sys-0.1.3\build.rs
|
||||
|
||||
D:\DiskC\ProgramData\Cargo\registry\src\index.crates.io-1949cf8c6b5b557f\esp-rom-sys-0.1.3\build.rs:
|
||||
Binary file not shown.
@@ -0,0 +1 @@
|
||||
This file has an mtime of when this was started.
|
||||
@@ -0,0 +1 @@
|
||||
INCLUDE "rom-functions.x"
|
||||
@@ -0,0 +1,20 @@
|
||||
INCLUDE "rom/esp32s3.rom.api.ld"
|
||||
INCLUDE "rom/esp32s3.rom.ld"
|
||||
INCLUDE "rom/esp32s3.rom.libgcc.ld"
|
||||
INCLUDE "rom/esp32s3.rom.version.ld"
|
||||
|
||||
/*
|
||||
TODO if BT_CTRL_RUN_IN_FLASH_ONLY
|
||||
|
||||
INCLUDE "rom/esp32s3.rom.ble_50.ld"
|
||||
INCLUDE "rom/esp32s3.rom.ble_cca.ld"
|
||||
INCLUDE "rom/esp32s3.rom.ble_dtm.ld"
|
||||
INCLUDE "rom/esp32s3.rom.ble_master.ld"
|
||||
INCLUDE "rom/esp32s3.rom.ble_scan.ld"
|
||||
INCLUDE "rom/esp32s3.rom.ble_smp.ld"
|
||||
INCLUDE "rom/esp32s3.rom.ble_test.ld"
|
||||
*/
|
||||
|
||||
INCLUDE "rom/esp32s3.rom.bt_funcs.ld"
|
||||
|
||||
INCLUDE "rom/additional.ld"
|
||||
@@ -0,0 +1,31 @@
|
||||
memset = 0x400011e8;
|
||||
memcpy = 0x400011f4;
|
||||
memmove = 0x40001200;
|
||||
memcmp = 0x4000120c;
|
||||
|
||||
strcpy = 0x40001218;
|
||||
strncpy = 0x40001224;
|
||||
strncmp = 0x4000123c;
|
||||
|
||||
bzero = 0x40001260;
|
||||
|
||||
PROVIDE(cache_dbus_mmu_set = 0x400019b0);
|
||||
PROVIDE( Cache_Suspend_DCache_Autoload = 0x40001734 );
|
||||
PROVIDE( Cache_Suspend_DCache = 0x400018b4 );
|
||||
|
||||
PROVIDE( strcat = 0x40001374 );
|
||||
PROVIDE( strcmp = 0x40001230 );
|
||||
PROVIDE( strchr = 0x4000138c );
|
||||
PROVIDE( strlcpy = 0x400013bc );
|
||||
PROVIDE( strstr = 0x40001254 );
|
||||
PROVIDE( strcasecmp = 0x4000135c );
|
||||
|
||||
EXTERN(__mktime);
|
||||
EXTERN(__strnlen);
|
||||
EXTERN(__atoi);
|
||||
|
||||
PROVIDE ( strnlen = __strnlen );
|
||||
PROVIDE ( atoi = __atoi );
|
||||
PROVIDE ( mktime = __mktime );
|
||||
|
||||
syscall_table_ptr = 0x3fceffd4;
|
||||
@@ -0,0 +1,69 @@
|
||||
/**
|
||||
* ROM APIs
|
||||
*/
|
||||
PROVIDE ( esp_rom_crc32_le = crc32_le );
|
||||
PROVIDE ( esp_rom_crc16_le = crc16_le );
|
||||
PROVIDE ( esp_rom_crc8_le = crc8_le );
|
||||
PROVIDE ( esp_rom_crc32_be = crc32_be );
|
||||
PROVIDE ( esp_rom_crc16_be = crc16_be );
|
||||
PROVIDE ( esp_rom_crc8_be = crc8_be );
|
||||
|
||||
PROVIDE ( esp_rom_gpio_pad_select_gpio = gpio_pad_select_gpio );
|
||||
PROVIDE ( esp_rom_gpio_pad_pullup_only = gpio_pad_pullup );
|
||||
PROVIDE ( esp_rom_gpio_pad_set_drv = gpio_pad_set_drv );
|
||||
PROVIDE ( esp_rom_gpio_pad_unhold = gpio_pad_unhold );
|
||||
PROVIDE ( esp_rom_gpio_connect_in_signal = gpio_matrix_in );
|
||||
PROVIDE ( esp_rom_gpio_connect_out_signal = gpio_matrix_out );
|
||||
|
||||
PROVIDE ( esp_rom_efuse_mac_address_crc8 = esp_crc8 );
|
||||
PROVIDE ( esp_rom_efuse_get_flash_gpio_info = ets_efuse_get_spiconfig );
|
||||
PROVIDE ( esp_rom_efuse_get_flash_wp_gpio = ets_efuse_get_wp_pad );
|
||||
PROVIDE ( esp_rom_efuse_is_secure_boot_enabled = ets_efuse_secure_boot_enabled );
|
||||
|
||||
PROVIDE ( esp_rom_uart_flush_tx = uart_tx_flush );
|
||||
PROVIDE ( esp_rom_uart_tx_one_char = uart_tx_one_char );
|
||||
PROVIDE ( esp_rom_uart_tx_wait_idle = uart_tx_wait_idle );
|
||||
PROVIDE ( esp_rom_uart_rx_one_char = uart_rx_one_char );
|
||||
PROVIDE ( esp_rom_uart_rx_string = UartRxString );
|
||||
PROVIDE ( esp_rom_uart_set_as_console = uart_tx_switch );
|
||||
PROVIDE ( esp_rom_uart_usb_acm_init = Uart_Init_USB );
|
||||
PROVIDE ( esp_rom_uart_putc = ets_write_char_uart );
|
||||
|
||||
PROVIDE ( esp_rom_output_flush_tx = uart_tx_flush );
|
||||
PROVIDE ( esp_rom_output_tx_one_char = uart_tx_one_char );
|
||||
PROVIDE ( esp_rom_output_tx_wait_idle = uart_tx_wait_idle );
|
||||
PROVIDE ( esp_rom_output_rx_one_char = uart_rx_one_char );
|
||||
PROVIDE ( esp_rom_output_rx_string = UartRxString );
|
||||
PROVIDE ( esp_rom_output_set_as_console = uart_tx_switch );
|
||||
PROVIDE ( esp_rom_output_usb_acm_init = Uart_Init_USB );
|
||||
PROVIDE ( esp_rom_output_putc = ets_write_char_uart );
|
||||
|
||||
PROVIDE ( esp_rom_md5_init = MD5Init );
|
||||
PROVIDE ( esp_rom_md5_update = MD5Update );
|
||||
PROVIDE ( esp_rom_md5_final = MD5Final );
|
||||
|
||||
PROVIDE ( esp_rom_software_reset_system = software_reset );
|
||||
PROVIDE ( esp_rom_software_reset_cpu = software_reset_cpu );
|
||||
|
||||
PROVIDE ( esp_rom_printf = ets_printf );
|
||||
PROVIDE ( esp_rom_delay_us = ets_delay_us );
|
||||
PROVIDE ( esp_rom_install_uart_printf = ets_install_uart_printf );
|
||||
PROVIDE ( esp_rom_get_reset_reason = rtc_get_reset_reason );
|
||||
PROVIDE ( esp_rom_route_intr_matrix = intr_matrix_set );
|
||||
PROVIDE ( esp_rom_get_cpu_ticks_per_us = ets_get_cpu_frequency );
|
||||
PROVIDE ( esp_rom_set_cpu_ticks_per_us = ets_update_cpu_frequency );
|
||||
|
||||
PROVIDE ( esp_rom_spiflash_attach = spi_flash_attach );
|
||||
PROVIDE ( esp_rom_spiflash_clear_bp = esp_rom_spiflash_unlock );
|
||||
PROVIDE ( esp_rom_spiflash_write_enable = SPI_write_enable);
|
||||
PROVIDE ( esp_rom_spiflash_erase_area = SPIEraseArea );
|
||||
|
||||
PROVIDE ( esp_rom_spiflash_fix_dummylen = spi_dummy_len_fix );
|
||||
PROVIDE ( esp_rom_spiflash_set_drvs = SetSpiDrvs);
|
||||
PROVIDE ( esp_rom_spiflash_select_padsfunc = SelectSpiFunction );
|
||||
PROVIDE ( esp_rom_spiflash_common_cmd = SPI_Common_Command );
|
||||
|
||||
PROVIDE ( esp_rom_regi2c_read = rom_i2c_readReg );
|
||||
PROVIDE ( esp_rom_regi2c_read_mask = rom_i2c_readReg_Mask );
|
||||
PROVIDE ( esp_rom_regi2c_write = rom_i2c_writeReg );
|
||||
PROVIDE ( esp_rom_regi2c_write_mask = rom_i2c_writeReg_Mask );
|
||||
@@ -0,0 +1,74 @@
|
||||
/*
|
||||
* SPDX-FileCopyrightText: 2024 Espressif Systems (Shanghai) CO LTD
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
/* ROM function interface esp32s3.rom.ld for esp32s3
|
||||
*
|
||||
*
|
||||
* Generated from ./interface-esp32s3.yml md5sum 39c4ce259b11323b9404c192b01b712b
|
||||
*
|
||||
* Compatible with ROM where ECO version equal or greater to 0.
|
||||
*
|
||||
* THIS FILE WAS AUTOMATICALLY GENERATED. DO NOT EDIT.
|
||||
*/
|
||||
|
||||
/* extend adv */
|
||||
f_hci_le_set_ext_adv_param_cmd_handler = 0x40000000;
|
||||
f_hci_le_set_adv_set_rand_addr_cmd_handler = 0x40000000;
|
||||
f_hci_le_set_ext_adv_data_cmd_handler = 0x40000000;
|
||||
f_hci_le_set_ext_scan_rsp_data_cmd_handler = 0x40000000;
|
||||
f_hci_le_set_ext_adv_en_cmd_handler = 0x40000000;
|
||||
f_hci_le_rd_max_adv_data_len_cmd_handler = 0x40000000;
|
||||
f_hci_le_rd_nb_supp_adv_sets_cmd_handler = 0x40000000;
|
||||
f_hci_le_rmv_adv_set_cmd_handler = 0x40000000;
|
||||
f_hci_le_clear_adv_sets_cmd_handler = 0x40000000;
|
||||
r_lld_adv_sync_info_set = 0x40000000;
|
||||
|
||||
r_lld_ext_adv_dynamic_pti_process = 0x40000000;
|
||||
r_lld_adv_ext_chain_construct = 0x40000000;
|
||||
r_lld_adv_aux_evt_canceled_cbk = 0x40000000;
|
||||
r_lld_adv_aux_evt_start_cbk = 0x40000000;
|
||||
r_lld_adv_aux_ch_idx_set = 0x40000000;
|
||||
|
||||
/* periodic adv */
|
||||
f_hci_le_set_per_adv_param_cmd_handler = 0x40000000;
|
||||
f_hci_le_set_per_adv_data_cmd_handler = 0x40000000;
|
||||
f_hci_le_set_per_adv_en_cmd_handler = 0x40000000;
|
||||
r_lld_per_adv_ch_map_update = 0x40000000;
|
||||
r_lld_per_adv_init = 0x40000000;
|
||||
|
||||
/* PA list */
|
||||
f_hci_le_add_dev_to_per_adv_list_cmd_handler = 0x40000000;
|
||||
f_hci_le_rmv_dev_from_per_adv_list_cmd_handler = 0x40000000;
|
||||
f_hci_le_clear_per_adv_list_cmd_handler = 0x40000000;
|
||||
f_hci_le_rd_per_adv_list_size_cmd_handler = 0x40000000;
|
||||
|
||||
/* extend scan */
|
||||
f_hci_le_set_ext_scan_param_cmd_handler = 0x40000000;
|
||||
f_hci_le_set_ext_scan_en_cmd_handler = 0x40000000;
|
||||
r_lld_scan_process_pkt_rx_ext_adv = 0x40000000;
|
||||
r_lld_scan_trunc_ind = 0x40000000;
|
||||
|
||||
/* extend con */
|
||||
f_hci_le_ext_create_con_cmd_handler = 0x40000000;
|
||||
r_lld_init_process_pkt_rx_adv_ext_ind = 0x40000000;
|
||||
r_lld_init_process_pkt_rx_aux_connect_rsp = 0x40000000;
|
||||
|
||||
/* PA sync */
|
||||
f_hci_le_per_adv_create_sync_cmd_handler = 0x40000000;
|
||||
f_hci_le_per_adv_create_sync_cancel_cmd_handler = 0x40000000;
|
||||
f_hci_le_per_adv_term_sync_cmd_handler = 0x40000000;
|
||||
f_lld_per_adv_rx_end_ind_handler_hack = 0x40000000;
|
||||
f_lld_sync_start_req_handler = 0x40000000;
|
||||
f_lld_per_adv_rep_ind_handler = 0x40000000;
|
||||
r_lld_sync_init = 0x40000000;
|
||||
|
||||
/* phy update*/
|
||||
f_llc_op_phy_upd_ind_handler = 0x40000000;
|
||||
f_ll_phy_req_handler = 0x40000000;
|
||||
f_ll_phy_rsp_handler = 0x40000000;
|
||||
f_ll_phy_update_ind_handler = 0x40000000;
|
||||
f_lld_phy_upd_cfm_handler = 0x40000000;
|
||||
f_hci_le_set_phy_cmd_handler = 0x40000000;
|
||||
llc_llcp_phy_update_ind_ack = 0x40000000;
|
||||
@@ -0,0 +1,31 @@
|
||||
/*
|
||||
* SPDX-FileCopyrightText: 2024 Espressif Systems (Shanghai) CO LTD
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
/* ROM function interface esp32s3.rom.ld for esp32s3
|
||||
*
|
||||
*
|
||||
* Generated from ./interface-esp32s3.yml md5sum 39c4ce259b11323b9404c192b01b712b
|
||||
*
|
||||
* Compatible with ROM where ECO version equal or greater to 0.
|
||||
*
|
||||
* THIS FILE WAS AUTOMATICALLY GENERATED. DO NOT EDIT.
|
||||
*/
|
||||
|
||||
/* SW CCA */
|
||||
r_lld_cca_con_evt_start_handle = 0x40000000;
|
||||
r_lld_hw_cca_end_isr = 0x40000000;
|
||||
r_lld_hw_cca_isr_eco = 0x40000000;
|
||||
r_lld_cca_bb_sync_found_handle = 0x40000000;
|
||||
r_lld_cca_data_reset = 0x40000000;
|
||||
r_lld_cca_sw_init = 0x40000000;
|
||||
r_lld_cca_con_evt_end_handle = 0x40000000;
|
||||
r_lld_cca_alloc = 0x40000000;
|
||||
r_lld_cca_sw_alloc = 0x40000000;
|
||||
r_lld_cca_sw_free = 0x40000000;
|
||||
r_lld_cca_free = 0x40000000;
|
||||
r_cca_init = 0x40000000;
|
||||
r_lld_hw_cca_evt_handler = 0x40000000;
|
||||
r_lld_sw_cca_evt_handler = 0x40000000;
|
||||
r_ble_sw_cca_check_isr = 0x40000000;
|
||||
@@ -0,0 +1,22 @@
|
||||
/*
|
||||
* SPDX-FileCopyrightText: 2024 Espressif Systems (Shanghai) CO LTD
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
/* ROM function interface esp32s3.rom.ld for esp32s3
|
||||
*
|
||||
*
|
||||
* Generated from ./interface-esp32s3.yml md5sum 39c4ce259b11323b9404c192b01b712b
|
||||
*
|
||||
* Compatible with ROM where ECO version equal or greater to 0.
|
||||
*
|
||||
* THIS FILE WAS AUTOMATICALLY GENERATED. DO NOT EDIT.
|
||||
*/
|
||||
|
||||
/* DTM */
|
||||
f_hci_le_rx_test_cmd_handler = 0x40000000;
|
||||
f_hci_le_tx_test_cmd_handler = 0x40000000;
|
||||
f_hci_le_enh_rx_test_cmd_handler = 0x40000000;
|
||||
f_hci_le_enh_tx_test_cmd_handler = 0x40000000;
|
||||
f_hci_le_test_end_cmd_handler = 0x40000000;
|
||||
r_lld_test_init = 0x40000000;
|
||||
@@ -0,0 +1,20 @@
|
||||
/*
|
||||
* SPDX-FileCopyrightText: 2024 Espressif Systems (Shanghai) CO LTD
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
/* ROM function interface esp32s3.rom.ld for esp32s3
|
||||
*
|
||||
*
|
||||
* Generated from ./interface-esp32s3.yml md5sum 39c4ce259b11323b9404c192b01b712b
|
||||
*
|
||||
* Compatible with ROM where ECO version equal or greater to 0.
|
||||
*
|
||||
* THIS FILE WAS AUTOMATICALLY GENERATED. DO NOT EDIT.
|
||||
*/
|
||||
|
||||
/* master */
|
||||
f_hci_le_create_con_cmd_handler = 0x40000000;
|
||||
f_hci_le_create_con_cancel_cmd_handler = 0x40000000;
|
||||
lld_init_end_ind_handler = 0x40000000;
|
||||
r_lld_init_init = 0x40000000;
|
||||
@@ -0,0 +1,37 @@
|
||||
/*
|
||||
* SPDX-FileCopyrightText: 2024 Espressif Systems (Shanghai) CO LTD
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
/* ROM function interface esp32s3.rom.ld for esp32s3
|
||||
*
|
||||
*
|
||||
* Generated from ./interface-esp32s3.yml md5sum 39c4ce259b11323b9404c192b01b712b
|
||||
*
|
||||
* Compatible with ROM where ECO version equal or greater to 0.
|
||||
*
|
||||
* THIS FILE WAS AUTOMATICALLY GENERATED. DO NOT EDIT.
|
||||
*/
|
||||
|
||||
|
||||
/* BLE scan */
|
||||
|
||||
f_hci_le_set_scan_param_cmd_handler = 0x40000000;
|
||||
f_hci_le_set_scan_en_cmd_handler = 0x40000000;
|
||||
f_llm_scan_period_to_handler_hack = 0x40000000;
|
||||
f_lld_adv_rep_ind_handler_hack = 0x40000000;
|
||||
r_lld_scan_init = 0x40000000;
|
||||
r_lld_scan_restart = 0x40000000;
|
||||
f_lld_scan_end_ind_handler_hack = 0x40000000;
|
||||
r_llm_env_adv_dup_filt_deinit_eco = 0x40000000;
|
||||
llm_exception_list_init = 0x40000000;
|
||||
llm_duplicate_list_init = 0x40000000;
|
||||
f_hci_vendor_ble_update_duplicate_exceptional_list_cmd_handler = 0x40000000;
|
||||
f_hci_vendor_ble_init_adv_flow_control_cmd_handler = 0x40000000;
|
||||
f_hci_vendor_ble_update_adv_report_flow_control_cmd_handler = 0x40000000;
|
||||
coex_schm_ble_scan_stop = 0x40000000;
|
||||
|
||||
f_hci_le_set_ext_scan_param_cmd_handler = 0x40000000;
|
||||
f_hci_le_set_ext_scan_en_cmd_handler = 0x40000000;
|
||||
r_lld_scan_process_pkt_rx_ext_adv = 0x40000000;
|
||||
r_lld_scan_trunc_ind = 0x40000000;
|
||||
@@ -0,0 +1,42 @@
|
||||
/*
|
||||
* SPDX-FileCopyrightText: 2024 Espressif Systems (Shanghai) CO LTD
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
/* ROM function interface esp32s3.rom.ld for esp32s3
|
||||
*
|
||||
*
|
||||
* Generated from ./interface-esp32s3.yml md5sum 39c4ce259b11323b9404c192b01b712b
|
||||
*
|
||||
* Compatible with ROM where ECO version equal or greater to 0.
|
||||
*
|
||||
* THIS FILE WAS AUTOMATICALLY GENERATED. DO NOT EDIT.
|
||||
*/
|
||||
|
||||
/* SMP */
|
||||
f_ll_pause_enc_req_handler = 0x40000000;
|
||||
f_ll_pause_enc_rsp_handler = 0x40000000;
|
||||
f_ll_enc_req_handler = 0x40000000;
|
||||
f_ll_enc_rsp_handler = 0x40000000;
|
||||
f_ll_start_enc_req_handler = 0x40000000;
|
||||
f_ll_start_enc_rsp_handler = 0x40000000;
|
||||
f_hci_le_start_enc_cmd_handler = 0x40000000;
|
||||
f_hci_le_ltk_req_reply_cmd_handler = 0x40000000;
|
||||
f_hci_le_ltk_req_neg_reply_cmd_handler = 0x40000000;
|
||||
f_llc_encrypt_ind_handler = 0x40000000;
|
||||
f_llc_op_encrypt_ind_handler = 0x40000000;
|
||||
f_hci_le_rd_local_p256_public_key_cmd_handler = 0x40000000;
|
||||
f_hci_le_generate_dhkey_cmd_handler = 0x40000000;
|
||||
f_hci_le_enc_cmd_handler = 0x40000000;
|
||||
r_rwip_crypt_evt_handler = 0x40000000;
|
||||
|
||||
/* LE ping */
|
||||
f_ll_ping_req_handler = 0x40000000;
|
||||
f_ll_ping_rsp_handler = 0x40000000;
|
||||
f_llc_op_le_ping_ind_handler = 0x40000000;
|
||||
f_llc_auth_payl_nearly_op_handler = 0x40000000;
|
||||
f_llc_auth_payl_real_to_handler = 0x40000000;
|
||||
f_llc_auth_payl_nearly_to_handler = 0x40000000;
|
||||
|
||||
/* ecc */
|
||||
r_ecc_init = 0x40000000;
|
||||
@@ -0,0 +1,37 @@
|
||||
/*
|
||||
* SPDX-FileCopyrightText: 2024 Espressif Systems (Shanghai) CO LTD
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
/* ROM function interface esp32s3.rom.ld for esp32s3
|
||||
*
|
||||
*
|
||||
* Generated from ./interface-esp32s3.yml md5sum 39c4ce259b11323b9404c192b01b712b
|
||||
*
|
||||
* Compatible with ROM where ECO version equal or greater to 0.
|
||||
*
|
||||
* THIS FILE WAS AUTOMATICALLY GENERATED. DO NOT EDIT.
|
||||
*/
|
||||
|
||||
|
||||
/* overwrite */
|
||||
lld_acl_rx_ind_handler = 0x40000000;
|
||||
lld_con_estab_ind_handler = 0x40000000;
|
||||
lld_adv_rep_ind_handler = 0x40000000;
|
||||
llm_rpa_renew_to_handler = 0x40000000;
|
||||
lld_scan_end_ind_handler = 0x40000000;
|
||||
llm_scan_period_to_handler = 0x40000000;
|
||||
|
||||
/* nvds */
|
||||
r_nvds_init = 0x40000000;
|
||||
f_nvds_get = 0x40000000;
|
||||
f_nvds_del = 0x40000000;
|
||||
f_nvds_put = 0x40000000;
|
||||
|
||||
/* controller flash */
|
||||
r_flash_init = 0x40000000;
|
||||
r_flash_env_init = 0x40000000;
|
||||
r_flash_env_deinit = 0x40000000;
|
||||
|
||||
/* QA test */
|
||||
f_hci_vendor_ble_qa_test_cmd_handler = 0x40000000;
|
||||
@@ -0,0 +1,902 @@
|
||||
/*
|
||||
* SPDX-FileCopyrightText: 2024-2025 Espressif Systems (Shanghai) CO LTD
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
/* ROM function interface esp32s3.rom.ld for esp32s3
|
||||
*
|
||||
*
|
||||
* Generated from ./interface-esp32s3.yml md5sum 39c4ce259b11323b9404c192b01b712b
|
||||
*
|
||||
* Compatible with ROM where ECO version equal or greater to 0.
|
||||
*
|
||||
* THIS FILE WAS AUTOMATICALLY GENERATED. DO NOT EDIT.
|
||||
*/
|
||||
|
||||
/***************************************
|
||||
Group bluetooth
|
||||
***************************************/
|
||||
|
||||
/* Functions */
|
||||
bt_rf_coex_get_dft_cfg = 0x40002a78;
|
||||
bt_rf_coex_hooks_p_set = 0x40002a84;
|
||||
btdm_con_maxevtime_cal_impl = 0x40002a90;
|
||||
btdm_controller_get_compile_version_impl = 0x40002a9c;
|
||||
btdm_controller_rom_data_init = 0x40002aa8;
|
||||
btdm_dis_privacy_err_report_impl = 0x40002ab4;
|
||||
btdm_disable_adv_delay_impl = 0x40002ac0;
|
||||
btdm_enable_scan_continue_impl = 0x40002acc;
|
||||
btdm_enable_scan_forever_impl = 0x40002ad8;
|
||||
btdm_get_power_state_impl = 0x40002ae4;
|
||||
btdm_get_prevent_sleep_flag_impl = 0x40002af0;
|
||||
btdm_power_state_active_impl = 0x40002afc;
|
||||
btdm_switch_phy_coded_impl = 0x40002b08;
|
||||
hci_acl_data_handler = 0x40002b14;
|
||||
hci_disconnect_cmd_handler = 0x40002b20;
|
||||
hci_le_con_upd_cmd_handler = 0x40002b2c;
|
||||
hci_le_ltk_req_neg_reply_cmd_handler = 0x40002b38;
|
||||
hci_le_ltk_req_reply_cmd_handler = 0x40002b44;
|
||||
hci_le_rd_chnl_map_cmd_handler = 0x40002b50;
|
||||
hci_le_rd_phy_cmd_handler = 0x40002b5c;
|
||||
hci_le_rd_rem_feats_cmd_handler = 0x40002b68;
|
||||
hci_le_rem_con_param_req_neg_reply_cmd_handler = 0x40002b74;
|
||||
hci_le_rem_con_param_req_reply_cmd_handler = 0x40002b80;
|
||||
hci_le_set_data_len_cmd_handler = 0x40002b8c;
|
||||
hci_le_set_phy_cmd_handler = 0x40002b98;
|
||||
hci_le_start_enc_cmd_handler = 0x40002ba4;
|
||||
hci_rd_auth_payl_to_cmd_handler = 0x40002bb0;
|
||||
hci_rd_rem_ver_info_cmd_handler = 0x40002bbc;
|
||||
hci_rd_rssi_cmd_handler = 0x40002bc8;
|
||||
hci_rd_tx_pwr_lvl_cmd_handler = 0x40002bd4;
|
||||
hci_vs_set_pref_slave_evt_dur_cmd_handler = 0x40002be0;
|
||||
hci_vs_set_pref_slave_latency_cmd_handler = 0x40002bec;
|
||||
hci_wr_auth_payl_to_cmd_handler = 0x40002bf8;
|
||||
ll_channel_map_ind_handler = 0x40002c04;
|
||||
ll_connection_param_req_handler = 0x40002c10;
|
||||
ll_connection_param_rsp_handler = 0x40002c1c;
|
||||
ll_connection_update_ind_handler = 0x40002c28;
|
||||
ll_enc_req_handler = 0x40002c34;
|
||||
ll_enc_rsp_handler = 0x40002c40;
|
||||
ll_feature_req_handler = 0x40002c4c;
|
||||
ll_feature_rsp_handler = 0x40002c58;
|
||||
ll_length_req_handler = 0x40002c64;
|
||||
ll_length_rsp_handler = 0x40002c70;
|
||||
ll_min_used_channels_ind_handler = 0x40002c7c;
|
||||
ll_pause_enc_req_handler = 0x40002c88;
|
||||
ll_pause_enc_rsp_handler = 0x40002c94;
|
||||
ll_phy_req_handler = 0x40002ca0;
|
||||
ll_phy_rsp_handler = 0x40002cac;
|
||||
ll_phy_update_ind_handler = 0x40002cb8;
|
||||
ll_ping_req_handler = 0x40002cc4;
|
||||
ll_ping_rsp_handler = 0x40002cd0;
|
||||
ll_slave_feature_req_handler = 0x40002cdc;
|
||||
ll_start_enc_req_handler = 0x40002ce8;
|
||||
ll_start_enc_rsp_handler = 0x40002cf4;
|
||||
ll_terminate_ind_handler = 0x40002d00;
|
||||
ll_version_ind_handler = 0x40002d0c;
|
||||
llc_auth_payl_nearly_to_handler = 0x40002d18;
|
||||
llc_auth_payl_real_to_handler = 0x40002d24;
|
||||
llc_encrypt_ind_handler = 0x40002d30;
|
||||
llc_hci_command_handler_wrapper = 0x40002d3c;
|
||||
llc_ll_connection_param_req_pdu_send = 0x40002d48;
|
||||
llc_ll_connection_param_rsp_pdu_send = 0x40002d54;
|
||||
llc_ll_connection_update_ind_pdu_send = 0x40002d60;
|
||||
llc_ll_enc_req_pdu_send = 0x40002d6c;
|
||||
llc_ll_enc_rsp_pdu_send = 0x40002d78;
|
||||
llc_ll_feature_req_pdu_send = 0x40002d84;
|
||||
llc_ll_feature_rsp_pdu_send = 0x40002d90;
|
||||
llc_ll_length_req_pdu_send = 0x40002d9c;
|
||||
llc_ll_length_rsp_pdu_send = 0x40002da8;
|
||||
llc_ll_pause_enc_req_pdu_send = 0x40002db4;
|
||||
llc_ll_pause_enc_rsp_pdu_send = 0x40002dc0;
|
||||
llc_ll_phy_req_pdu_send = 0x40002dcc;
|
||||
llc_ll_phy_rsp_pdu_send = 0x40002dd8;
|
||||
llc_ll_ping_req_pdu_send = 0x40002de4;
|
||||
llc_ll_ping_rsp_pdu_send = 0x40002df0;
|
||||
llc_ll_start_enc_req_pdu_send = 0x40002dfc;
|
||||
llc_ll_start_enc_rsp_pdu_send = 0x40002e08;
|
||||
llc_ll_terminate_ind_pdu_send = 0x40002e14;
|
||||
llc_ll_unknown_rsp_pdu_send = 0x40002e20;
|
||||
llc_llcp_ch_map_update_ind_pdu_send = 0x40002e2c;
|
||||
llc_llcp_phy_upd_ind_pdu_send = 0x40002e38;
|
||||
llc_llcp_version_ind_pdu_send = 0x40002e44;
|
||||
llc_op_ch_map_upd_ind_handler = 0x40002e50;
|
||||
llc_op_con_upd_ind_handler = 0x40002e5c;
|
||||
llc_op_disconnect_ind_handler = 0x40002e68;
|
||||
llc_op_dl_upd_ind_handler = 0x40002e74;
|
||||
llc_op_encrypt_ind_handler = 0x40002e80;
|
||||
llc_op_feats_exch_ind_handler = 0x40002e8c;
|
||||
llc_op_le_ping_ind_handler = 0x40002e98;
|
||||
llc_op_phy_upd_ind_handler = 0x40002ea4;
|
||||
llc_op_ver_exch_ind_handler = 0x40002eb0;
|
||||
llc_stopped_ind_handler = 0x40002ebc;
|
||||
lld_acl_rx_ind_handler = 0x40002ec8;
|
||||
lld_acl_tx_cfm_handler = 0x40002ed4;
|
||||
lld_adv_end_ind_handler = 0x40002ee0;
|
||||
lld_adv_rep_ind_handler = 0x40002eec;
|
||||
lld_ch_map_upd_cfm_handler = 0x40002ef8;
|
||||
lld_con_estab_ind_handler = 0x40002f04;
|
||||
lld_con_evt_sd_evt_time_set = 0x40002f10;
|
||||
lld_con_offset_upd_ind_handler = 0x40002f1c;
|
||||
lld_con_param_upd_cfm_handler = 0x40002f28;
|
||||
lld_disc_ind_handler = 0x40002f34;
|
||||
lld_init_end_ind_handler = 0x40002f40;
|
||||
lld_llcp_rx_ind_handler_wrapper = 0x40002f4c;
|
||||
lld_llcp_tx_cfm_handler = 0x40002f58;
|
||||
lld_per_adv_end_ind_handler = 0x40002f64;
|
||||
lld_per_adv_rep_ind_handler = 0x40002f70;
|
||||
lld_per_adv_rx_end_ind_handler = 0x40002f7c;
|
||||
lld_phy_coded_500k_get = 0x40002f88;
|
||||
lld_phy_upd_cfm_handler = 0x40002f94;
|
||||
lld_scan_end_ind_handler = 0x40002fa0;
|
||||
lld_scan_req_ind_handler = 0x40002fac;
|
||||
lld_sync_start_req_handler = 0x40002fb8;
|
||||
lld_test_end_ind_handler = 0x40002fc4;
|
||||
lld_update_rxbuf_handler = 0x40002fd0;
|
||||
llm_ch_map_update_ind_handler = 0x40002fdc;
|
||||
llm_hci_command_handler_wrapper = 0x40002fe8;
|
||||
llm_scan_period_to_handler = 0x40002ff4;
|
||||
r_Add2SelfBigHex256 = 0x40003000;
|
||||
r_AddBigHex256 = 0x4000300c;
|
||||
r_AddBigHexModP256 = 0x40003018;
|
||||
r_AddP256 = 0x40003024;
|
||||
r_AddPdiv2_256 = 0x40003030;
|
||||
r_GF_Jacobian_Point_Addition256 = 0x4000303c;
|
||||
r_GF_Jacobian_Point_Double256 = 0x40003048;
|
||||
r_GF_Point_Jacobian_To_Affine256 = 0x40003054;
|
||||
r_MultiplyBigHexByUint32_256 = 0x40003060;
|
||||
r_MultiplyBigHexModP256 = 0x4000306c;
|
||||
r_MultiplyByU16ModP256 = 0x40003078;
|
||||
r_SubtractBigHex256 = 0x40003084;
|
||||
r_SubtractBigHexMod256 = 0x40003090;
|
||||
r_SubtractBigHexUint32_256 = 0x4000309c;
|
||||
r_SubtractFromSelfBigHex256 = 0x400030a8;
|
||||
r_SubtractFromSelfBigHexSign256 = 0x400030b4;
|
||||
r_aes_alloc = 0x400030c0;
|
||||
r_aes_ccm_continue = 0x400030cc;
|
||||
r_aes_ccm_process_e = 0x400030d8;
|
||||
r_aes_ccm_xor_128_lsb = 0x400030e4;
|
||||
r_aes_ccm_xor_128_msb = 0x400030f0;
|
||||
r_aes_cmac_continue = 0x400030fc;
|
||||
r_aes_cmac_start = 0x40003108;
|
||||
r_aes_k1_continue = 0x40003114;
|
||||
r_aes_k2_continue = 0x40003120;
|
||||
r_aes_k3_continue = 0x4000312c;
|
||||
r_aes_k4_continue = 0x40003138;
|
||||
r_aes_shift_left_128 = 0x40003144;
|
||||
r_aes_start = 0x40003150;
|
||||
r_aes_xor_128 = 0x4000315c;
|
||||
r_assert_err = 0x40003168;
|
||||
r_assert_param = 0x40003174;
|
||||
r_assert_warn = 0x40003180;
|
||||
r_bigHexInversion256 = 0x4000318c;
|
||||
r_ble_sw_cca_check_isr = 0x40003198;
|
||||
r_ble_util_buf_acl_tx_alloc = 0x400031a4;
|
||||
r_ble_util_buf_acl_tx_elt_get = 0x400031b0;
|
||||
r_ble_util_buf_acl_tx_free = 0x400031bc;
|
||||
r_ble_util_buf_acl_tx_free_in_isr = 0x400031c8;
|
||||
r_ble_util_buf_adv_tx_alloc = 0x400031d4;
|
||||
r_ble_util_buf_adv_tx_free = 0x400031e0;
|
||||
r_ble_util_buf_adv_tx_free_in_isr = 0x400031ec;
|
||||
r_ble_util_buf_env_deinit = 0x400031f8;
|
||||
r_ble_util_buf_env_init = 0x40003204;
|
||||
r_ble_util_buf_get_rx_buf_nb = 0x40003210;
|
||||
r_ble_util_buf_get_rx_buf_size = 0x4000321c;
|
||||
r_ble_util_buf_llcp_tx_alloc = 0x40003228;
|
||||
r_ble_util_buf_llcp_tx_free = 0x40003234;
|
||||
r_ble_util_buf_rx_alloc = 0x40003240;
|
||||
r_ble_util_buf_rx_alloc_in_isr = 0x4000324c;
|
||||
r_ble_util_buf_rx_free = 0x40003258;
|
||||
r_ble_util_buf_rx_free_in_isr = 0x40003264;
|
||||
r_ble_util_buf_set_rx_buf_nb = 0x40003270;
|
||||
r_ble_util_buf_set_rx_buf_size = 0x4000327c;
|
||||
r_ble_util_data_rx_buf_reset = 0x40003288;
|
||||
r_bt_bb_get_intr_mask = 0x40003294;
|
||||
r_bt_bb_intr_clear = 0x400032a0;
|
||||
r_bt_bb_intr_mask_set = 0x400032ac;
|
||||
r_bt_bb_isr = 0x400032b8;
|
||||
r_bt_rf_coex_cfg_set = 0x400032c4;
|
||||
r_bt_rf_coex_conn_dynamic_pti_en_get = 0x400032d0;
|
||||
r_bt_rf_coex_conn_phy_coded_data_time_limit_en_get = 0x400032dc;
|
||||
r_bt_rf_coex_ext_adv_dynamic_pti_en_get = 0x400032e8;
|
||||
r_bt_rf_coex_ext_scan_dynamic_pti_en_get = 0x400032f4;
|
||||
r_bt_rf_coex_legacy_adv_dynamic_pti_en_get = 0x40003300;
|
||||
r_bt_rf_coex_per_adv_dynamic_pti_en_get = 0x4000330c;
|
||||
r_bt_rf_coex_pti_table_get = 0x40003318;
|
||||
r_bt_rf_coex_st_param_get = 0x40003324;
|
||||
r_bt_rf_coex_st_param_set = 0x40003330;
|
||||
r_bt_rf_coex_sync_scan_dynamic_pti_en_get = 0x4000333c;
|
||||
r_bt_rma_apply_rule_cs_fmt = 0x40003348;
|
||||
r_bt_rma_apply_rule_cs_idx = 0x40003354;
|
||||
r_bt_rma_configure = 0x40003360;
|
||||
r_bt_rma_deregister_rule_cs_fmt = 0x4000336c;
|
||||
r_bt_rma_deregister_rule_cs_idx = 0x40003378;
|
||||
r_bt_rma_get_ant_by_act = 0x40003384;
|
||||
r_bt_rma_init = 0x40003390;
|
||||
r_bt_rma_register_rule_cs_fmt = 0x4000339c;
|
||||
r_bt_rma_register_rule_cs_idx = 0x400033a8;
|
||||
r_bt_rtp_apply_rule_cs_fmt = 0x400033b4;
|
||||
r_bt_rtp_apply_rule_cs_idx = 0x400033c0;
|
||||
r_bt_rtp_deregister_rule_cs_fmt = 0x400033cc;
|
||||
r_bt_rtp_deregister_rule_cs_idx = 0x400033d8;
|
||||
r_bt_rtp_get_txpwr_idx_by_act = 0x400033e4;
|
||||
r_bt_rtp_init = 0x400033f0;
|
||||
r_bt_rtp_register_rule_cs_fmt = 0x400033fc;
|
||||
r_bt_rtp_register_rule_cs_idx = 0x40003408;
|
||||
r_btdm_isr = 0x40003414;
|
||||
r_btdm_task_post = 0x40003420;
|
||||
r_btdm_task_post_from_isr = 0x4000342c;
|
||||
r_btdm_task_recycle = 0x40003438;
|
||||
r_cali_phase_match_p = 0x40003444;
|
||||
r_cmp_abs_time = 0x40003450;
|
||||
r_cmp_dest_id = 0x4000345c;
|
||||
r_cmp_timer_id = 0x40003468;
|
||||
r_co_bdaddr_compare = 0x40003474;
|
||||
r_co_ble_pkt_dur_in_us = 0x40003480;
|
||||
r_co_list_extract = 0x4000348c;
|
||||
r_co_list_extract_after = 0x40003498;
|
||||
r_co_list_extract_sublist = 0x400034a4;
|
||||
r_co_list_find = 0x400034b0;
|
||||
r_co_list_init = 0x400034bc;
|
||||
r_co_list_insert_after = 0x400034c8;
|
||||
r_co_list_insert_before = 0x400034d4;
|
||||
r_co_list_merge = 0x400034e0;
|
||||
r_co_list_pool_init = 0x400034ec;
|
||||
r_co_list_pop_front = 0x400034f8;
|
||||
r_co_list_push_back = 0x40003504;
|
||||
r_co_list_push_back_sublist = 0x40003510;
|
||||
r_co_list_push_front = 0x4000351c;
|
||||
r_co_list_size = 0x40003528;
|
||||
r_co_nb_good_le_channels = 0x40003534;
|
||||
r_co_util_pack = 0x40003540;
|
||||
r_co_util_read_array_size = 0x4000354c;
|
||||
r_co_util_unpack = 0x40003558;
|
||||
r_dbg_env_deinit = 0x40003564;
|
||||
r_dbg_env_init = 0x40003570;
|
||||
r_dbg_platform_reset_complete = 0x4000357c;
|
||||
r_dl_upd_proc_start = 0x40003588;
|
||||
r_dump_data = 0x40003594;
|
||||
r_ecc_abort_key256_generation = 0x400035a0;
|
||||
r_ecc_gen_new_public_key = 0x400035ac;
|
||||
r_ecc_gen_new_secret_key = 0x400035b8;
|
||||
r_ecc_generate_key256 = 0x400035c4;
|
||||
r_ecc_get_debug_Keys = 0x400035d0;
|
||||
r_ecc_init = 0x400035dc;
|
||||
r_ecc_is_valid_point = 0x400035e8;
|
||||
r_ecc_multiplication_event_handler = 0x400035f4;
|
||||
r_ecc_point_multiplication_win_256 = 0x40003600;
|
||||
r_emi_alloc_em_mapping_by_offset = 0x4000360c;
|
||||
r_emi_base_reg_lut_show = 0x40003618;
|
||||
r_emi_em_base_reg_show = 0x40003624;
|
||||
r_emi_free_em_mapping_by_offset = 0x40003630;
|
||||
r_emi_get_em_mapping_idx_by_offset = 0x4000363c;
|
||||
r_emi_get_mem_addr_by_offset = 0x40003648;
|
||||
r_emi_overwrite_em_mapping_by_offset = 0x40003654;
|
||||
r_esp_vendor_hci_command_handler = 0x40003660;
|
||||
r_get_stack_usage = 0x4000366c;
|
||||
r_h4tl_acl_hdr_rx_evt_handler = 0x40003678;
|
||||
r_h4tl_cmd_hdr_rx_evt_handler = 0x40003684;
|
||||
r_h4tl_cmd_pld_rx_evt_handler = 0x40003690;
|
||||
r_h4tl_eif_io_event_post = 0x4000369c;
|
||||
r_h4tl_eif_register = 0x400036a8;
|
||||
r_h4tl_init = 0x400036b4;
|
||||
r_h4tl_out_of_sync = 0x400036c0;
|
||||
r_h4tl_out_of_sync_check = 0x400036cc;
|
||||
r_h4tl_read_hdr = 0x400036d8;
|
||||
r_h4tl_read_next_out_of_sync = 0x400036e4;
|
||||
r_h4tl_read_payl = 0x400036f0;
|
||||
r_h4tl_read_start = 0x400036fc;
|
||||
r_h4tl_rx_acl_hdr_extract = 0x40003708;
|
||||
r_h4tl_rx_cmd_hdr_extract = 0x40003714;
|
||||
r_h4tl_rx_done = 0x40003720;
|
||||
r_h4tl_start = 0x4000372c;
|
||||
r_h4tl_stop = 0x40003738;
|
||||
r_h4tl_tx_done = 0x40003744;
|
||||
r_h4tl_tx_evt_handler = 0x40003750;
|
||||
r_h4tl_write = 0x4000375c;
|
||||
r_hci_acl_tx_data_alloc = 0x40003768;
|
||||
r_hci_acl_tx_data_received = 0x40003774;
|
||||
r_hci_basic_cmd_send_2_controller = 0x40003780;
|
||||
r_hci_ble_adv_report_filter_check = 0x4000378c;
|
||||
r_hci_ble_adv_report_tx_check = 0x40003798;
|
||||
r_hci_ble_conhdl_register = 0x400037a4;
|
||||
r_hci_ble_conhdl_unregister = 0x400037b0;
|
||||
r_hci_build_acl_data = 0x400037bc;
|
||||
r_hci_build_cc_evt = 0x400037c8;
|
||||
r_hci_build_cs_evt = 0x400037d4;
|
||||
r_hci_build_evt = 0x400037e0;
|
||||
r_hci_build_le_evt = 0x400037ec;
|
||||
r_hci_cmd_get_max_param_size = 0x400037f8;
|
||||
r_hci_cmd_received = 0x40003804;
|
||||
r_hci_cmd_reject = 0x40003810;
|
||||
r_hci_evt_mask_check = 0x4000381c;
|
||||
r_hci_evt_mask_set = 0x40003828;
|
||||
r_hci_fc_acl_buf_size_set = 0x40003834;
|
||||
r_hci_fc_acl_en = 0x40003840;
|
||||
r_hci_fc_acl_packet_sent = 0x4000384c;
|
||||
r_hci_fc_check_host_available_nb_acl_packets = 0x40003858;
|
||||
r_hci_fc_host_nb_acl_pkts_complete = 0x40003864;
|
||||
r_hci_fc_init = 0x40003870;
|
||||
r_hci_look_for_cmd_desc = 0x4000387c;
|
||||
r_hci_look_for_evt_desc = 0x40003888;
|
||||
r_hci_look_for_le_evt_desc = 0x40003894;
|
||||
r_hci_look_for_le_evt_desc_esp = 0x400038a0;
|
||||
r_hci_pack_bytes = 0x400038ac;
|
||||
r_hci_register_vendor_desc_tab = 0x400038b8;
|
||||
r_hci_send_2_controller = 0x400038c4;
|
||||
r_hci_send_2_host = 0x400038d0;
|
||||
r_hci_tl_c2h_data_flow_on = 0x400038dc;
|
||||
r_hci_tl_cmd_hdr_rx_evt_handler = 0x400038e8;
|
||||
r_hci_tl_cmd_pld_rx_evt_handler = 0x400038f4;
|
||||
r_hci_tl_get_pkt = 0x40003900;
|
||||
r_hci_tl_hci_pkt_handler = 0x4000390c;
|
||||
r_hci_tl_hci_tx_done_evt_handler = 0x40003918;
|
||||
r_hci_tl_inc_nb_h2c_cmd_pkts = 0x40003924;
|
||||
r_hci_tl_save_pkt = 0x40003930;
|
||||
r_hci_tl_send = 0x4000393c;
|
||||
r_hci_tx_done = 0x40003948;
|
||||
r_hci_tx_start = 0x40003954;
|
||||
r_hci_tx_trigger = 0x40003960;
|
||||
r_isValidSecretKey_256 = 0x4000396c;
|
||||
r_ke_check_malloc = 0x40003978;
|
||||
r_ke_event_callback_set = 0x40003984;
|
||||
r_ke_event_clear = 0x40003990;
|
||||
r_ke_event_flush = 0x4000399c;
|
||||
r_ke_event_get = 0x400039a8;
|
||||
r_ke_event_get_all = 0x400039b4;
|
||||
r_ke_event_init = 0x400039c0;
|
||||
r_ke_event_schedule = 0x400039cc;
|
||||
r_ke_event_set = 0x400039d8;
|
||||
r_ke_flush = 0x400039e4;
|
||||
r_ke_free = 0x400039f0;
|
||||
r_ke_handler_search = 0x400039fc;
|
||||
r_ke_init = 0x40003a08;
|
||||
r_ke_is_free = 0x40003a14;
|
||||
r_ke_malloc = 0x40003a20;
|
||||
r_ke_mem_init = 0x40003a2c;
|
||||
r_ke_mem_is_empty = 0x40003a38;
|
||||
r_ke_mem_is_in_heap = 0x40003a44;
|
||||
r_ke_msg_alloc = 0x40003a50;
|
||||
r_ke_msg_dest_id_get = 0x40003a5c;
|
||||
r_ke_msg_discard = 0x40003a68;
|
||||
r_ke_msg_forward = 0x40003a74;
|
||||
r_ke_msg_forward_new_id = 0x40003a80;
|
||||
r_ke_msg_free = 0x40003a8c;
|
||||
r_ke_msg_in_queue = 0x40003a98;
|
||||
r_ke_msg_save = 0x40003aa4;
|
||||
r_ke_msg_send = 0x40003ab0;
|
||||
r_ke_msg_send_basic = 0x40003abc;
|
||||
r_ke_msg_src_id_get = 0x40003ac8;
|
||||
r_ke_queue_extract = 0x40003ad4;
|
||||
r_ke_queue_insert = 0x40003ae0;
|
||||
r_ke_sleep_check = 0x40003aec;
|
||||
r_ke_state_get = 0x40003af8;
|
||||
r_ke_state_set = 0x40003b04;
|
||||
r_ke_task_check = 0x40003b10;
|
||||
r_ke_task_create = 0x40003b1c;
|
||||
r_ke_task_delete = 0x40003b28;
|
||||
r_ke_task_handler_get = 0x40003b34;
|
||||
r_ke_task_init = 0x40003b40;
|
||||
r_ke_task_msg_flush = 0x40003b4c;
|
||||
r_ke_task_saved_update = 0x40003b58;
|
||||
r_ke_task_schedule = 0x40003b64;
|
||||
r_ke_time = 0x40003b70;
|
||||
r_ke_time_cmp = 0x40003b7c;
|
||||
r_ke_time_past = 0x40003b88;
|
||||
r_ke_timer_active = 0x40003b94;
|
||||
r_ke_timer_adjust_all = 0x40003ba0;
|
||||
r_ke_timer_clear = 0x40003bac;
|
||||
r_ke_timer_init = 0x40003bb8;
|
||||
r_ke_timer_schedule = 0x40003bc4;
|
||||
r_ke_timer_set = 0x40003bd0;
|
||||
r_led_init = 0x40003bdc;
|
||||
r_led_set_all = 0x40003be8;
|
||||
r_llc_aes_res_cb = 0x40003bf4;
|
||||
r_llc_ch_map_up_proc_err_cb = 0x40003c00;
|
||||
r_llc_cleanup = 0x40003c0c;
|
||||
r_llc_cmd_cmp_send = 0x40003c18;
|
||||
r_llc_cmd_stat_send = 0x40003c24;
|
||||
r_llc_con_move_cbk = 0x40003c30;
|
||||
r_llc_con_plan_set_update = 0x40003c3c;
|
||||
r_llc_con_upd_param_in_range = 0x40003c48;
|
||||
r_llc_disconnect = 0x40003c54;
|
||||
r_llc_disconnect_end = 0x40003c60;
|
||||
r_llc_disconnect_proc_continue = 0x40003c6c;
|
||||
r_llc_disconnect_proc_err_cb = 0x40003c78;
|
||||
r_llc_dl_chg_check = 0x40003c84;
|
||||
r_llc_dle_proc_err_cb = 0x40003c90;
|
||||
r_llc_feats_exch_proc_err_cb = 0x40003c9c;
|
||||
r_llc_hci_cmd_handler_tab_p_get = 0x40003ca8;
|
||||
r_llc_hci_command_handler = 0x40003cb4;
|
||||
r_llc_hci_con_param_req_evt_send = 0x40003cc0;
|
||||
r_llc_hci_con_upd_info_send = 0x40003ccc;
|
||||
r_llc_hci_disconnected_dis = 0x40003cd8;
|
||||
r_llc_hci_dl_upd_info_send = 0x40003ce4;
|
||||
r_llc_hci_enc_evt_send = 0x40003cf0;
|
||||
r_llc_hci_feats_info_send = 0x40003cfc;
|
||||
r_llc_hci_le_phy_upd_cmp_evt_send = 0x40003d08;
|
||||
r_llc_hci_ltk_request_evt_send = 0x40003d14;
|
||||
r_llc_hci_nb_cmp_pkts_evt_send = 0x40003d20;
|
||||
r_llc_hci_version_info_send = 0x40003d2c;
|
||||
r_llc_init_term_proc = 0x40003d38;
|
||||
r_llc_iv_skd_rand_gen = 0x40003d44;
|
||||
r_llc_le_ping_proc_continue = 0x40003d50;
|
||||
r_llc_le_ping_proc_err_cb = 0x40003d5c;
|
||||
r_llc_le_ping_restart = 0x40003d68;
|
||||
r_llc_le_ping_set = 0x40003d74;
|
||||
r_llc_ll_pause_enc_rsp_ack_handler = 0x40003d80;
|
||||
r_llc_ll_reject_ind_ack_handler = 0x40003d8c;
|
||||
r_llc_ll_reject_ind_pdu_send = 0x40003d98;
|
||||
r_llc_ll_start_enc_rsp_ack_handler = 0x40003da4;
|
||||
r_llc_ll_terminate_ind_ack = 0x40003db0;
|
||||
r_llc_ll_unknown_ind_handler = 0x40003dbc;
|
||||
r_llc_llcp_send = 0x40003dc8;
|
||||
r_llc_llcp_state_set = 0x40003dd4;
|
||||
r_llc_llcp_trans_timer_set = 0x40003de0;
|
||||
r_llc_llcp_tx_check = 0x40003dec;
|
||||
r_llc_loc_ch_map_proc_continue = 0x40003df8;
|
||||
r_llc_loc_con_upd_proc_continue = 0x40003e04;
|
||||
r_llc_loc_con_upd_proc_err_cb = 0x40003e10;
|
||||
r_llc_loc_dl_upd_proc_continue = 0x40003e1c;
|
||||
r_llc_loc_encrypt_proc_continue = 0x40003e28;
|
||||
r_llc_loc_encrypt_proc_err_cb = 0x40003e34;
|
||||
r_llc_loc_feats_exch_proc_continue = 0x40003e40;
|
||||
r_llc_loc_phy_upd_proc_continue = 0x40003e4c;
|
||||
r_llc_loc_phy_upd_proc_err_cb = 0x40003e58;
|
||||
r_llc_msg_handler_tab_p_get = 0x40003e64;
|
||||
r_llc_pref_param_compute = 0x40003e70;
|
||||
r_llc_proc_collision_check = 0x40003e7c;
|
||||
r_llc_proc_err_ind = 0x40003e88;
|
||||
r_llc_proc_get = 0x40003e94;
|
||||
r_llc_proc_id_get = 0x40003ea0;
|
||||
r_llc_proc_reg = 0x40003eac;
|
||||
r_llc_proc_state_get = 0x40003eb8;
|
||||
r_llc_proc_state_set = 0x40003ec4;
|
||||
r_llc_proc_timer_pause_set = 0x40003ed0;
|
||||
r_llc_proc_timer_set = 0x40003edc;
|
||||
r_llc_proc_unreg = 0x40003ee8;
|
||||
r_llc_rem_ch_map_proc_continue = 0x40003ef4;
|
||||
r_llc_rem_con_upd_proc_continue = 0x40003f00;
|
||||
r_llc_rem_con_upd_proc_err_cb = 0x40003f0c;
|
||||
r_llc_rem_dl_upd_proc = 0x40003f18;
|
||||
r_llc_rem_encrypt_proc_continue = 0x40003f24;
|
||||
r_llc_rem_encrypt_proc_err_cb = 0x40003f30;
|
||||
r_llc_rem_phy_upd_proc_continue = 0x40003f3c;
|
||||
r_llc_rem_phy_upd_proc_err_cb = 0x40003f48;
|
||||
r_llc_role_get = 0x40003f54;
|
||||
r_llc_sk_gen = 0x40003f60;
|
||||
r_llc_start = 0x40003f6c;
|
||||
r_llc_stop = 0x40003f78;
|
||||
r_llc_ver_exch_loc_proc_continue = 0x40003f84;
|
||||
r_llc_ver_proc_err_cb = 0x40003f90;
|
||||
r_llcp_pdu_handler_tab_p_get = 0x40003f9c;
|
||||
r_lld_aa_gen = 0x40003fa8;
|
||||
r_lld_adv_adv_data_set = 0x40003fb4;
|
||||
r_lld_adv_adv_data_update = 0x40003fc0;
|
||||
r_lld_adv_aux_ch_idx_set = 0x40003fcc;
|
||||
r_lld_adv_aux_evt_canceled_cbk = 0x40003fd8;
|
||||
r_lld_adv_aux_evt_start_cbk = 0x40003fe4;
|
||||
r_lld_adv_coex_check_ext_adv_synced = 0x40003ff0;
|
||||
r_lld_adv_coex_env_reset = 0x40003ffc;
|
||||
r_lld_adv_duration_update = 0x40004008;
|
||||
r_lld_adv_dynamic_pti_process = 0x40004014;
|
||||
r_lld_adv_end = 0x40004020;
|
||||
r_lld_adv_evt_canceled_cbk = 0x4000402c;
|
||||
r_lld_adv_evt_start_cbk = 0x40004038;
|
||||
r_lld_adv_ext_chain_construct = 0x40004044;
|
||||
r_lld_adv_ext_pkt_prepare = 0x40004050;
|
||||
r_lld_adv_frm_cbk = 0x4000405c;
|
||||
r_lld_adv_frm_isr = 0x40004068;
|
||||
r_lld_adv_frm_skip_isr = 0x40004074;
|
||||
r_lld_adv_init = 0x40004080;
|
||||
r_lld_adv_pkt_rx = 0x4000408c;
|
||||
r_lld_adv_pkt_rx_connect_ind = 0x40004098;
|
||||
r_lld_adv_pkt_rx_send_scan_req_evt = 0x400040a4;
|
||||
r_lld_adv_rand_addr_update = 0x400040b0;
|
||||
r_lld_adv_restart = 0x400040bc;
|
||||
r_lld_adv_scan_rsp_data_set = 0x400040c8;
|
||||
r_lld_adv_scan_rsp_data_update = 0x400040d4;
|
||||
r_lld_adv_set_tx_power = 0x400040e0;
|
||||
r_lld_adv_start = 0x400040ec;
|
||||
r_lld_adv_stop = 0x400040f8;
|
||||
r_lld_adv_sync_info_set = 0x40004104;
|
||||
r_lld_adv_sync_info_update = 0x40004110;
|
||||
r_lld_calc_aux_rx = 0x4000411c;
|
||||
r_lld_cca_alloc = 0x40004128;
|
||||
r_lld_cca_data_reset = 0x40004134;
|
||||
r_lld_cca_free = 0x40004140;
|
||||
r_lld_ch_assess_data_get = 0x4000414c;
|
||||
r_lld_ch_idx_get = 0x40004158;
|
||||
r_lld_ch_map_set = 0x40004164;
|
||||
r_lld_channel_assess = 0x40004170;
|
||||
r_lld_con_activity_act_offset_compute = 0x4000417c;
|
||||
r_lld_con_activity_offset_compute = 0x40004188;
|
||||
r_lld_con_ch_map_update = 0x40004194;
|
||||
r_lld_con_cleanup = 0x400041a0;
|
||||
r_lld_con_current_tx_power_get = 0x400041ac;
|
||||
r_lld_con_data_flow_set = 0x400041b8;
|
||||
r_lld_con_data_len_update = 0x400041c4;
|
||||
r_lld_con_data_tx = 0x400041d0;
|
||||
r_lld_con_enc_key_load = 0x400041dc;
|
||||
r_lld_con_event_counter_get = 0x400041e8;
|
||||
r_lld_con_evt_canceled_cbk = 0x400041f4;
|
||||
r_lld_con_evt_duration_min_get = 0x40004200;
|
||||
r_lld_con_evt_max_eff_time_cal = 0x4000420c;
|
||||
r_lld_con_evt_sd_evt_time_get = 0x40004218;
|
||||
r_lld_con_evt_start_cbk = 0x40004224;
|
||||
r_lld_con_evt_time_update = 0x40004230;
|
||||
r_lld_con_free_all_tx_buf = 0x4000423c;
|
||||
r_lld_con_frm_cbk = 0x40004248;
|
||||
r_lld_con_frm_isr = 0x40004254;
|
||||
r_lld_con_frm_skip_isr = 0x40004260;
|
||||
r_lld_con_init = 0x4000426c;
|
||||
r_lld_con_llcp_tx = 0x40004278;
|
||||
r_lld_con_max_lat_calc = 0x40004284;
|
||||
r_lld_con_offset_get = 0x40004290;
|
||||
r_lld_con_param_update = 0x4000429c;
|
||||
r_lld_con_phys_update = 0x400042a8;
|
||||
r_lld_con_pref_slave_evt_dur_set = 0x400042b4;
|
||||
r_lld_con_pref_slave_latency_set = 0x400042c0;
|
||||
r_lld_con_rssi_get = 0x400042cc;
|
||||
r_lld_con_rx = 0x400042d8;
|
||||
r_lld_con_rx_channel_assess = 0x400042e4;
|
||||
r_lld_con_rx_enc = 0x400042f0;
|
||||
r_lld_con_rx_isr = 0x400042fc;
|
||||
r_lld_con_rx_link_info_check = 0x40004308;
|
||||
r_lld_con_rx_llcp_check = 0x40004314;
|
||||
r_lld_con_rx_sync_time_update = 0x40004320;
|
||||
r_lld_con_sched = 0x4000432c;
|
||||
r_lld_con_set_tx_power = 0x40004338;
|
||||
r_lld_con_start = 0x40004344;
|
||||
r_lld_con_stop = 0x40004350;
|
||||
r_lld_con_tx = 0x4000435c;
|
||||
r_lld_con_tx_enc = 0x40004368;
|
||||
r_lld_con_tx_isr = 0x40004374;
|
||||
r_lld_con_tx_len_update = 0x40004380;
|
||||
r_lld_con_tx_len_update_for_intv = 0x4000438c;
|
||||
r_lld_con_tx_len_update_for_rate = 0x40004398;
|
||||
r_lld_con_tx_prog = 0x400043a4;
|
||||
r_lld_conn_dynamic_pti_process = 0x400043b0;
|
||||
r_lld_continue_scan_rx_isr_end_process = 0x400043bc;
|
||||
r_lld_ext_scan_dynamic_pti_process = 0x400043c8;
|
||||
r_lld_hw_cca_end_isr = 0x400043d4;
|
||||
r_lld_hw_cca_evt_handler = 0x400043e0;
|
||||
r_lld_hw_cca_isr = 0x400043ec;
|
||||
r_lld_init_cal_anchor_point = 0x400043f8;
|
||||
r_lld_init_compute_winoffset = 0x40004404;
|
||||
r_lld_init_connect_req_pack = 0x40004410;
|
||||
r_lld_init_end = 0x4000441c;
|
||||
r_lld_init_evt_canceled_cbk = 0x40004428;
|
||||
r_lld_init_evt_start_cbk = 0x40004434;
|
||||
r_lld_init_frm_cbk = 0x40004440;
|
||||
r_lld_init_frm_eof_isr = 0x4000444c;
|
||||
r_lld_init_frm_skip_isr = 0x40004458;
|
||||
r_lld_init_init = 0x40004464;
|
||||
r_lld_init_process_pkt_rx = 0x40004470;
|
||||
r_lld_init_process_pkt_rx_adv_ext_ind = 0x4000447c;
|
||||
r_lld_init_process_pkt_rx_adv_ind_or_direct_ind = 0x40004488;
|
||||
r_lld_init_process_pkt_rx_aux_connect_rsp = 0x40004494;
|
||||
r_lld_init_process_pkt_tx = 0x400044a0;
|
||||
r_lld_init_process_pkt_tx_cal_con_timestamp = 0x400044ac;
|
||||
r_lld_init_sched = 0x400044b8;
|
||||
r_lld_init_set_tx_power = 0x400044c4;
|
||||
r_lld_init_start = 0x400044d0;
|
||||
r_lld_init_stop = 0x400044dc;
|
||||
r_lld_instant_proc_end = 0x400044e8;
|
||||
r_lld_llcp_rx_ind_handler = 0x400044f4;
|
||||
r_lld_per_adv_ch_map_update = 0x40004500;
|
||||
r_lld_per_adv_chain_construct = 0x4000450c;
|
||||
r_lld_per_adv_cleanup = 0x40004518;
|
||||
r_lld_per_adv_coex_env_reset = 0x40004524;
|
||||
r_lld_per_adv_data_set = 0x40004530;
|
||||
r_lld_per_adv_data_update = 0x4000453c;
|
||||
r_lld_per_adv_dynamic_pti_process = 0x40004548;
|
||||
r_lld_per_adv_evt_canceled_cbk = 0x40004554;
|
||||
r_lld_per_adv_evt_start_cbk = 0x40004560;
|
||||
r_lld_per_adv_ext_pkt_prepare = 0x4000456c;
|
||||
r_lld_per_adv_frm_cbk = 0x40004578;
|
||||
r_lld_per_adv_frm_isr = 0x40004584;
|
||||
r_lld_per_adv_frm_skip_isr = 0x40004590;
|
||||
r_lld_per_adv_init = 0x4000459c;
|
||||
r_lld_per_adv_init_info_get = 0x400045a8;
|
||||
r_lld_per_adv_list_add = 0x400045b4;
|
||||
r_lld_per_adv_list_rem = 0x400045c0;
|
||||
r_lld_per_adv_sched = 0x400045cc;
|
||||
r_lld_per_adv_set_tx_power = 0x400045d8;
|
||||
r_lld_per_adv_start = 0x400045e4;
|
||||
r_lld_per_adv_stop = 0x400045f0;
|
||||
r_lld_per_adv_sync_info_get = 0x400045fc;
|
||||
r_lld_process_cca_data = 0x40004608;
|
||||
r_lld_ral_search = 0x40004614;
|
||||
r_lld_read_clock = 0x40004620;
|
||||
r_lld_res_list_add = 0x4000462c;
|
||||
r_lld_res_list_clear = 0x40004638;
|
||||
r_lld_res_list_is_empty = 0x40004644;
|
||||
r_lld_res_list_local_rpa_get = 0x40004650;
|
||||
r_lld_res_list_peer_rpa_get = 0x4000465c;
|
||||
r_lld_res_list_peer_update = 0x40004668;
|
||||
r_lld_res_list_priv_mode_update = 0x40004674;
|
||||
r_lld_res_list_rem = 0x40004680;
|
||||
r_lld_reset_reg = 0x4000468c;
|
||||
r_lld_rpa_renew = 0x40004698;
|
||||
r_lld_rpa_renew_evt_canceled_cbk = 0x400046a4;
|
||||
r_lld_rpa_renew_evt_start_cbk = 0x400046b0;
|
||||
r_lld_rpa_renew_instant_cbk = 0x400046bc;
|
||||
r_lld_rxdesc_check = 0x400046c8;
|
||||
r_lld_rxdesc_free = 0x400046d4;
|
||||
r_lld_scan_create_sync = 0x400046e0;
|
||||
r_lld_scan_create_sync_cancel = 0x400046ec;
|
||||
r_lld_scan_end = 0x400046f8;
|
||||
r_lld_scan_evt_canceled_cbk = 0x40004704;
|
||||
r_lld_scan_evt_start_cbk = 0x40004710;
|
||||
r_lld_scan_frm_cbk = 0x4000471c;
|
||||
r_lld_scan_frm_eof_isr = 0x40004728;
|
||||
r_lld_scan_frm_rx_isr = 0x40004734;
|
||||
r_lld_scan_frm_skip_isr = 0x40004740;
|
||||
r_lld_scan_init = 0x4000474c;
|
||||
r_lld_scan_params_update = 0x40004758;
|
||||
r_lld_scan_process_pkt_rx = 0x40004764;
|
||||
r_lld_scan_process_pkt_rx_adv_rep = 0x40004770;
|
||||
r_lld_scan_process_pkt_rx_aux_adv_ind = 0x4000477c;
|
||||
r_lld_scan_process_pkt_rx_aux_chain_ind = 0x40004788;
|
||||
r_lld_scan_process_pkt_rx_aux_scan_rsp = 0x40004794;
|
||||
r_lld_scan_process_pkt_rx_ext_adv = 0x400047a0;
|
||||
r_lld_scan_process_pkt_rx_ext_adv_ind = 0x400047ac;
|
||||
r_lld_scan_process_pkt_rx_legacy_adv = 0x400047b8;
|
||||
r_lld_scan_restart = 0x400047c4;
|
||||
r_lld_scan_sched = 0x400047d0;
|
||||
r_lld_scan_set_tx_power = 0x400047dc;
|
||||
r_lld_scan_start = 0x400047e8;
|
||||
r_lld_scan_stop = 0x400047f4;
|
||||
r_lld_scan_sync_accept = 0x40004800;
|
||||
r_lld_scan_sync_info_unpack = 0x4000480c;
|
||||
r_lld_scan_trunc_ind = 0x40004818;
|
||||
r_lld_sw_cca_evt_handler = 0x40004824;
|
||||
r_lld_sw_cca_isr = 0x40004830;
|
||||
r_lld_sync_ch_map_update = 0x4000483c;
|
||||
r_lld_sync_cleanup = 0x40004848;
|
||||
r_lld_sync_evt_canceled_cbk = 0x40004854;
|
||||
r_lld_sync_evt_start_cbk = 0x40004860;
|
||||
r_lld_sync_frm_cbk = 0x4000486c;
|
||||
r_lld_sync_frm_eof_isr = 0x40004878;
|
||||
r_lld_sync_frm_rx_isr = 0x40004884;
|
||||
r_lld_sync_frm_skip_isr = 0x40004890;
|
||||
r_lld_sync_init = 0x4000489c;
|
||||
r_lld_sync_process_pkt_rx = 0x400048a8;
|
||||
r_lld_sync_process_pkt_rx_aux_sync_ind = 0x400048b4;
|
||||
r_lld_sync_process_pkt_rx_pkt_check = 0x400048c0;
|
||||
r_lld_sync_scan_dynamic_pti_process = 0x400048cc;
|
||||
r_lld_sync_sched = 0x400048d8;
|
||||
r_lld_sync_start = 0x400048e4;
|
||||
r_lld_sync_stop = 0x400048f0;
|
||||
r_lld_sync_trunc_ind = 0x400048fc;
|
||||
r_lld_test_cleanup = 0x40004908;
|
||||
r_lld_test_evt_canceled_cbk = 0x40004914;
|
||||
r_lld_test_evt_start_cbk = 0x40004920;
|
||||
r_lld_test_freq2chnl = 0x4000492c;
|
||||
r_lld_test_frm_cbk = 0x40004938;
|
||||
r_lld_test_frm_isr = 0x40004944;
|
||||
r_lld_test_init = 0x40004950;
|
||||
r_lld_test_rx_isr = 0x4000495c;
|
||||
r_lld_test_set_tx_power = 0x40004968;
|
||||
r_lld_test_start = 0x40004974;
|
||||
r_lld_test_stop = 0x40004980;
|
||||
r_lld_update_rxbuf = 0x4000498c;
|
||||
r_lld_update_rxbuf_isr = 0x40004998;
|
||||
r_lld_white_list_add = 0x400049a4;
|
||||
r_lld_white_list_rem = 0x400049b0;
|
||||
r_llm_activity_free_get = 0x400049bc;
|
||||
r_llm_activity_free_set = 0x400049c8;
|
||||
r_llm_activity_syncing_get = 0x400049d4;
|
||||
r_llm_adv_con_len_check = 0x400049e0;
|
||||
r_llm_adv_hdl_to_id = 0x400049ec;
|
||||
r_llm_adv_rep_flow_control_check = 0x400049f8;
|
||||
r_llm_adv_rep_flow_control_update = 0x40004a04;
|
||||
r_llm_adv_reports_list_check = 0x40004a10;
|
||||
r_llm_adv_set_all_release = 0x40004a1c;
|
||||
r_llm_adv_set_dft_params = 0x40004a28;
|
||||
r_llm_adv_set_release = 0x40004a34;
|
||||
r_llm_aes_res_cb = 0x40004a40;
|
||||
r_llm_ble_update_adv_flow_control = 0x40004a4c;
|
||||
r_llm_ch_map_update = 0x40004a58;
|
||||
r_llm_cmd_cmp_send = 0x40004a64;
|
||||
r_llm_cmd_stat_send = 0x40004a70;
|
||||
r_llm_dev_list_empty_entry = 0x40004a7c;
|
||||
r_llm_dev_list_search = 0x40004a88;
|
||||
r_llm_env_adv_dup_filt_deinit = 0x40004a94;
|
||||
r_llm_env_adv_dup_filt_init = 0x40004aa0;
|
||||
r_llm_init_ble_adv_report_flow_contol = 0x40004aac;
|
||||
r_llm_is_dev_connected = 0x40004ab8;
|
||||
r_llm_is_dev_synced = 0x40004ac4;
|
||||
r_llm_is_non_con_act_ongoing_check = 0x40004ad0;
|
||||
r_llm_is_wl_accessible = 0x40004adc;
|
||||
r_llm_le_evt_mask_check = 0x40004ae8;
|
||||
r_llm_le_features_get = 0x40004af4;
|
||||
r_llm_link_disc = 0x40004b00;
|
||||
r_llm_master_ch_map_get = 0x40004b0c;
|
||||
r_llm_msg_handler_tab_p_get = 0x40004b18;
|
||||
r_llm_no_activity = 0x40004b24;
|
||||
r_llm_per_adv_slot_dur = 0x40004b30;
|
||||
r_llm_plan_elt_get = 0x40004b3c;
|
||||
r_llm_rx_path_comp_get = 0x40004b48;
|
||||
r_llm_scan_start = 0x40004b54;
|
||||
r_llm_scan_sync_acad_attach = 0x40004b60;
|
||||
r_llm_scan_sync_acad_detach = 0x40004b6c;
|
||||
r_llm_send_adv_lost_event_to_host = 0x40004b78;
|
||||
r_llm_tx_path_comp_get = 0x40004b84;
|
||||
r_misc_deinit = 0x40004b90;
|
||||
r_misc_free_em_buf_in_isr = 0x40004b9c;
|
||||
r_misc_init = 0x40004ba8;
|
||||
r_misc_msg_handler_tab_p_get = 0x40004bb4;
|
||||
r_notEqual256 = 0x40004bc0;
|
||||
r_phy_upd_proc_start = 0x40004bcc;
|
||||
r_platform_reset = 0x40004bd8;
|
||||
r_register_esp_vendor_cmd_handler = 0x40004be4;
|
||||
r_rf_em_init = 0x40004bf0;
|
||||
r_rf_force_agc_enable = 0x40004bfc;
|
||||
r_rf_reg_rd = 0x40004c08;
|
||||
r_rf_reg_wr = 0x40004c14;
|
||||
r_rf_reset = 0x40004c20;
|
||||
r_rf_rssi_convert = 0x40004c2c;
|
||||
r_rf_rw_v9_le_disable = 0x40004c38;
|
||||
r_rf_rw_v9_le_enable = 0x40004c44;
|
||||
r_rf_sleep = 0x40004c50;
|
||||
r_rf_txpwr_cs_get = 0x40004c5c;
|
||||
r_rf_txpwr_dbm_get = 0x40004c68;
|
||||
r_rf_util_cs_fmt_convert = 0x40004c74;
|
||||
r_rw_crypto_aes_ccm = 0x40004c80;
|
||||
r_rw_crypto_aes_encrypt = 0x40004c8c;
|
||||
r_rw_crypto_aes_init = 0x40004c98;
|
||||
r_rw_crypto_aes_k1 = 0x40004ca4;
|
||||
r_rw_crypto_aes_k2 = 0x40004cb0;
|
||||
r_rw_crypto_aes_k3 = 0x40004cbc;
|
||||
r_rw_crypto_aes_k4 = 0x40004cc8;
|
||||
r_rw_crypto_aes_rand = 0x40004cd4;
|
||||
r_rw_crypto_aes_result_handler = 0x40004ce0;
|
||||
r_rw_crypto_aes_s1 = 0x40004cec;
|
||||
r_rw_cryto_aes_cmac = 0x40004cf8;
|
||||
r_rw_v9_init_em_radio_table = 0x40004d04;
|
||||
r_rwble_isr = 0x40004d10;
|
||||
r_rwble_sleep_enter = 0x40004d1c;
|
||||
r_rwble_sleep_wakeup_end = 0x40004d28;
|
||||
r_rwbtdm_isr_wrapper = 0x40004d34;
|
||||
r_rwip_active_check = 0x40004d40;
|
||||
r_rwip_aes_encrypt = 0x40004d4c;
|
||||
r_rwip_assert = 0x40004d58;
|
||||
r_rwip_crypt_evt_handler = 0x40004d64;
|
||||
r_rwip_crypt_isr_handler = 0x40004d70;
|
||||
r_rwip_eif_get = 0x40004d7c;
|
||||
r_rwip_half_slot_2_lpcycles = 0x40004d88;
|
||||
r_rwip_hus_2_lpcycles = 0x40004d94;
|
||||
r_rwip_isr = 0x40004da0;
|
||||
r_rwip_lpcycles_2_hus = 0x40004dac;
|
||||
r_rwip_prevent_sleep_clear = 0x40004db8;
|
||||
r_rwip_prevent_sleep_set = 0x40004dc4;
|
||||
r_rwip_schedule = 0x40004dd0;
|
||||
r_rwip_sleep = 0x40004ddc;
|
||||
r_rwip_sw_int_handler = 0x40004de8;
|
||||
r_rwip_sw_int_req = 0x40004df4;
|
||||
r_rwip_time_get = 0x40004e00;
|
||||
r_rwip_timer_10ms_handler = 0x40004e0c;
|
||||
r_rwip_timer_10ms_set = 0x40004e18;
|
||||
r_rwip_timer_hs_handler = 0x40004e24;
|
||||
r_rwip_timer_hs_set = 0x40004e30;
|
||||
r_rwip_timer_hus_handler = 0x40004e3c;
|
||||
r_rwip_timer_hus_set = 0x40004e48;
|
||||
r_rwip_wakeup = 0x40004e54;
|
||||
r_rwip_wakeup_end = 0x40004e60;
|
||||
r_rwip_wlcoex_set = 0x40004e6c;
|
||||
r_sch_alarm_clear = 0x40004e78;
|
||||
r_sch_alarm_init = 0x40004e84;
|
||||
r_sch_alarm_prog = 0x40004e90;
|
||||
r_sch_alarm_set = 0x40004e9c;
|
||||
r_sch_alarm_timer_isr = 0x40004ea8;
|
||||
r_sch_arb_conflict_check = 0x40004eb4;
|
||||
r_sch_arb_elt_cancel = 0x40004ec0;
|
||||
r_sch_arb_event_start_isr = 0x40004ecc;
|
||||
r_sch_arb_init = 0x40004ed8;
|
||||
r_sch_arb_insert = 0x40004ee4;
|
||||
r_sch_arb_prog_timer = 0x40004ef0;
|
||||
r_sch_arb_remove = 0x40004efc;
|
||||
r_sch_arb_sw_isr = 0x40004f08;
|
||||
r_sch_plan_chk = 0x40004f14;
|
||||
r_sch_plan_clock_wrap_offset_update = 0x40004f20;
|
||||
r_sch_plan_init = 0x40004f2c;
|
||||
r_sch_plan_interval_req = 0x40004f38;
|
||||
r_sch_plan_offset_max_calc = 0x40004f44;
|
||||
r_sch_plan_offset_req = 0x40004f50;
|
||||
r_sch_plan_position_range_compute = 0x40004f5c;
|
||||
r_sch_plan_rem = 0x40004f68;
|
||||
r_sch_plan_req = 0x40004f74;
|
||||
r_sch_plan_set = 0x40004f80;
|
||||
r_sch_prog_end_isr = 0x40004f8c;
|
||||
r_sch_prog_init = 0x40004f98;
|
||||
r_sch_prog_push = 0x40004fa4;
|
||||
r_sch_prog_rx_isr = 0x40004fb0;
|
||||
r_sch_prog_skip_isr = 0x40004fbc;
|
||||
r_sch_prog_tx_isr = 0x40004fc8;
|
||||
r_sch_slice_bg_add = 0x40004fd4;
|
||||
r_sch_slice_bg_remove = 0x40004fe0;
|
||||
r_sch_slice_compute = 0x40004fec;
|
||||
r_sch_slice_fg_add = 0x40004ff8;
|
||||
r_sch_slice_fg_remove = 0x40005004;
|
||||
r_sch_slice_init = 0x40005010;
|
||||
r_sch_slice_per_add = 0x4000501c;
|
||||
r_sch_slice_per_remove = 0x40005028;
|
||||
r_sdk_config_get_bt_sleep_enable = 0x40005034;
|
||||
r_sdk_config_get_hl_derived_opts = 0x40005040;
|
||||
r_sdk_config_get_opts = 0x4000504c;
|
||||
r_sdk_config_get_priv_opts = 0x40005058;
|
||||
r_sdk_config_set_bt_sleep_enable = 0x40005064;
|
||||
r_sdk_config_set_hl_derived_opts = 0x40005070;
|
||||
r_sdk_config_set_opts = 0x4000507c;
|
||||
r_specialModP256 = 0x40005088;
|
||||
r_unloaded_area_init = 0x40005094;
|
||||
r_vhci_flow_off = 0x400050a0;
|
||||
r_vhci_flow_on = 0x400050ac;
|
||||
r_vhci_notify_host_send_available = 0x400050b8;
|
||||
r_vhci_send_to_host = 0x400050c4;
|
||||
r_vnd_hci_command_handler = 0x400050d0;
|
||||
r_vshci_init = 0x400050dc;
|
||||
vnd_hci_command_handler_wrapper = 0x400050e8;
|
||||
r_lld_legacy_adv_dynamic_pti_get = 0x400050f4;
|
||||
r_lld_legacy_adv_dynamic_pti_process = 0x40005100;
|
||||
r_lld_ext_adv_dynamic_pti_get = 0x4000510c;
|
||||
r_lld_ext_adv_dynamic_aux_pti_process = 0x40005118;
|
||||
r_lld_ext_adv_dynamic_pti_process = 0x40005124;
|
||||
r_lld_adv_ext_pkt_prepare_set = 0x40005130;
|
||||
r_lld_adv_ext_chain_none_construct = 0x4000513c;
|
||||
r_lld_adv_ext_chain_connectable_construct = 0x40005148;
|
||||
r_lld_adv_ext_chain_scannable_construct = 0x40005154;
|
||||
r_lld_adv_pkt_rx_connect_post = 0x40005160;
|
||||
r_lld_adv_start_init_evt_param = 0x4000516c;
|
||||
r_lld_adv_start_set_cs = 0x40005178;
|
||||
r_lld_adv_start_update_filter_policy = 0x40005184;
|
||||
r_lld_adv_start_schedule_asap = 0x40005190;
|
||||
r_lld_con_tx_prog_new_packet_coex = 0x4000519c;
|
||||
r_lld_con_tx_prog_new_packet = 0x400051a8;
|
||||
r_lld_per_adv_dynamic_pti_get = 0x400051b4;
|
||||
r_lld_per_adv_evt_start_chm_upd = 0x400051c0;
|
||||
r_lld_ext_scan_dynamic_pti_get = 0x400051cc;
|
||||
r_lld_scan_try_sched = 0x400051d8;
|
||||
r_lld_sync_insert = 0x400051e4;
|
||||
r_sch_prog_ble_push = 0x400051f0;
|
||||
r_sch_prog_bt_push = 0x400051fc;
|
||||
r_lld_init_evt_end_type_set = 0x40005208;
|
||||
r_lld_init_evt_end_type_get = 0x40005214;
|
||||
r_lld_adv_direct_adv_use_rpa_addr_state_set = 0x40005220;
|
||||
r_lld_adv_direct_adv_use_rpa_addr_state_get = 0x4000522c;
|
||||
r_lld_init_evt_end_type_check_state_set = 0x40005238;
|
||||
r_lld_init_evt_end_type_check_state_get = 0x40005244;
|
||||
|
||||
/* bluetooth hook funcs */
|
||||
r_llc_loc_encrypt_proc_continue_hook = 0x40001c60;
|
||||
r_llc_loc_phy_upd_proc_continue_hook = 0x40001c64;
|
||||
r_llc_rem_phy_upd_proc_continue_hook = 0x40001c68;
|
||||
r_lld_scan_frm_eof_isr_hook = 0x40001c6c;
|
||||
r_lld_scan_evt_start_cbk_hook = 0x40001c70;
|
||||
r_lld_scan_process_pkt_rx_ext_adv_hook = 0x40001c78;
|
||||
r_lld_scan_sched_hook = 0x40001c7c;
|
||||
r_lld_adv_evt_start_cbk_hook = 0x40001c84;
|
||||
r_lld_adv_aux_evt_start_cbk_hook = 0x40001c88;
|
||||
r_lld_adv_frm_isr_hook = 0x40001c8c;
|
||||
r_lld_adv_start_init_evt_param_hook = 0x40001c90;
|
||||
r_lld_con_evt_canceled_cbk_hook = 0x40001c94;
|
||||
r_lld_con_frm_isr_hook = 0x40001c98;
|
||||
r_lld_con_tx_hook = 0x40001c9c;
|
||||
r_lld_con_rx_hook = 0x40001ca0;
|
||||
r_lld_con_evt_start_cbk_hook = 0x40001ca4;
|
||||
r_lld_con_tx_prog_new_packet_hook = 0x40001cac;
|
||||
r_lld_init_frm_eof_isr_hook = 0x40001cb0;
|
||||
r_lld_init_evt_start_cbk_hook = 0x40001cb4;
|
||||
r_lld_init_sched_hook = 0x40001cbc;
|
||||
r_lld_init_process_pkt_tx_hook = 0x40001cc0;
|
||||
r_lld_per_adv_evt_start_cbk_hook = 0x40001cc4;
|
||||
r_lld_per_adv_frm_isr_hook = 0x40001cc8;
|
||||
r_lld_per_adv_start_hook = 0x40001ccc;
|
||||
r_lld_sync_frm_eof_isr_hook = 0x40001cd0;
|
||||
r_lld_sync_evt_start_cbk_hook = 0x40001cd4;
|
||||
r_lld_sync_start_hook = 0x40001cd8;
|
||||
r_lld_sync_process_pkt_rx_pkt_check_hook = 0x40001cdc;
|
||||
r_sch_arb_insert_hook = 0x40001ce0;
|
||||
r_sch_plan_offset_req_hook = 0x40001ce4;
|
||||
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,105 @@
|
||||
/* ROM function interface esp32s3.rom.libgcc.ld for esp32s3
|
||||
*
|
||||
*
|
||||
* Generated from ./interface-esp32s3.yml md5sum 39c4ce259b11323b9404c192b01b712b
|
||||
*
|
||||
* Compatible with ROM where ECO version equal or greater to 0.
|
||||
*
|
||||
* THIS FILE WAS AUTOMATICALLY GENERATED. DO NOT EDIT.
|
||||
*/
|
||||
|
||||
/***************************************
|
||||
Group libgcc
|
||||
***************************************/
|
||||
|
||||
/* Functions */
|
||||
__absvdi2 = 0x4000216c;
|
||||
__absvsi2 = 0x40002178;
|
||||
__adddf3 = 0x40002184;
|
||||
__addsf3 = 0x40002190;
|
||||
__addvdi3 = 0x4000219c;
|
||||
__addvsi3 = 0x400021a8;
|
||||
__ashldi3 = 0x400021b4;
|
||||
__ashrdi3 = 0x400021c0;
|
||||
__bswapdi2 = 0x400021cc;
|
||||
__bswapsi2 = 0x400021d8;
|
||||
__clear_cache = 0x400021e4;
|
||||
__clrsbdi2 = 0x400021f0;
|
||||
__clrsbsi2 = 0x400021fc;
|
||||
__clzdi2 = 0x40002208;
|
||||
__clzsi2 = 0x40002214;
|
||||
__cmpdi2 = 0x40002220;
|
||||
__ctzdi2 = 0x4000222c;
|
||||
__ctzsi2 = 0x40002238;
|
||||
__divdc3 = 0x40002244;
|
||||
__divdf3 = 0x40002250;
|
||||
__divdi3 = 0x4000225c;
|
||||
__divsc3 = 0x40002268;
|
||||
__divsf3 = 0x40002274;
|
||||
__divsi3 = 0x40002280;
|
||||
__eqdf2 = 0x4000228c;
|
||||
__eqsf2 = 0x40002298;
|
||||
__extendsfdf2 = 0x400022a4;
|
||||
__ffsdi2 = 0x400022b0;
|
||||
__ffssi2 = 0x400022bc;
|
||||
__fixdfdi = 0x400022c8;
|
||||
__fixdfsi = 0x400022d4;
|
||||
__fixsfdi = 0x400022e0;
|
||||
__fixsfsi = 0x400022ec;
|
||||
__fixunsdfsi = 0x400022f8;
|
||||
__fixunssfdi = 0x40002304;
|
||||
__fixunssfsi = 0x40002310;
|
||||
__floatdidf = 0x4000231c;
|
||||
__floatdisf = 0x40002328;
|
||||
__floatsidf = 0x40002334;
|
||||
__floatsisf = 0x40002340;
|
||||
__floatundidf = 0x4000234c;
|
||||
__floatundisf = 0x40002358;
|
||||
__floatunsidf = 0x40002364;
|
||||
__floatunsisf = 0x40002370;
|
||||
__gcc_bcmp = 0x4000237c;
|
||||
__gedf2 = 0x40002388;
|
||||
__gesf2 = 0x40002394;
|
||||
__gtdf2 = 0x400023a0;
|
||||
__gtsf2 = 0x400023ac;
|
||||
__ledf2 = 0x400023b8;
|
||||
__lesf2 = 0x400023c4;
|
||||
__lshrdi3 = 0x400023d0;
|
||||
__ltdf2 = 0x400023dc;
|
||||
__ltsf2 = 0x400023e8;
|
||||
__moddi3 = 0x400023f4;
|
||||
__modsi3 = 0x40002400;
|
||||
__muldc3 = 0x4000240c;
|
||||
__muldf3 = 0x40002418;
|
||||
__muldi3 = 0x40002424;
|
||||
__mulsc3 = 0x40002430;
|
||||
__mulsf3 = 0x4000243c;
|
||||
__mulsi3 = 0x40002448;
|
||||
__mulvdi3 = 0x40002454;
|
||||
__mulvsi3 = 0x40002460;
|
||||
__nedf2 = 0x4000246c;
|
||||
__negdf2 = 0x40002478;
|
||||
__negdi2 = 0x40002484;
|
||||
__negsf2 = 0x40002490;
|
||||
__negvdi2 = 0x4000249c;
|
||||
__negvsi2 = 0x400024a8;
|
||||
__nesf2 = 0x400024b4;
|
||||
__paritysi2 = 0x400024c0;
|
||||
__popcountdi2 = 0x400024cc;
|
||||
__popcountsi2 = 0x400024d8;
|
||||
__powidf2 = 0x400024e4;
|
||||
__powisf2 = 0x400024f0;
|
||||
__subdf3 = 0x400024fc;
|
||||
__subsf3 = 0x40002508;
|
||||
__subvdi3 = 0x40002514;
|
||||
__subvsi3 = 0x40002520;
|
||||
__truncdfsf2 = 0x4000252c;
|
||||
__ucmpdi2 = 0x40002538;
|
||||
__udivdi3 = 0x40002544;
|
||||
__udivmoddi4 = 0x40002550;
|
||||
__udivsi3 = 0x4000255c;
|
||||
__udiv_w_sdiv = 0x40002568;
|
||||
__umoddi3 = 0x40002574;
|
||||
__umodsi3 = 0x40002580;
|
||||
__unorddf2 = 0x4000258c;
|
||||
__unordsf2 = 0x40002598;
|
||||
@@ -0,0 +1,8 @@
|
||||
/* ROM version variables for esp32s3
|
||||
*
|
||||
* These addresses should be compatible with any ROM version for this chip.
|
||||
*
|
||||
* THIS FILE WAS AUTOMATICALLY GENERATED. DO NOT EDIT.
|
||||
*/
|
||||
_rom_chip_id = 0x40000570;
|
||||
_rom_eco_version = 0x40000574;
|
||||
@@ -0,0 +1,543 @@
|
||||
cargo:rustc-check-cfg=cfg(not_really_docsrs)
|
||||
cargo:rustc-check-cfg=cfg(semver_checks)
|
||||
cargo:rustc-check-cfg=cfg(esp32)
|
||||
cargo:rustc-check-cfg=cfg(xtensa)
|
||||
cargo:rustc-check-cfg=cfg(multi_core)
|
||||
cargo:rustc-check-cfg=cfg(soc_has_aes)
|
||||
cargo:rustc-check-cfg=cfg(soc_has_apb_ctrl)
|
||||
cargo:rustc-check-cfg=cfg(soc_has_bb)
|
||||
cargo:rustc-check-cfg=cfg(soc_has_dport)
|
||||
cargo:rustc-check-cfg=cfg(soc_has_system)
|
||||
cargo:rustc-check-cfg=cfg(soc_has_efuse)
|
||||
cargo:rustc-check-cfg=cfg(soc_has_emac_dma)
|
||||
cargo:rustc-check-cfg=cfg(soc_has_emac_ext)
|
||||
cargo:rustc-check-cfg=cfg(soc_has_emac_mac)
|
||||
cargo:rustc-check-cfg=cfg(soc_has_flash_encryption)
|
||||
cargo:rustc-check-cfg=cfg(soc_has_frc_timer)
|
||||
cargo:rustc-check-cfg=cfg(soc_has_gpio)
|
||||
cargo:rustc-check-cfg=cfg(soc_has_gpio_sd)
|
||||
cargo:rustc-check-cfg=cfg(soc_has_hinf)
|
||||
cargo:rustc-check-cfg=cfg(soc_has_i2c0)
|
||||
cargo:rustc-check-cfg=cfg(soc_has_i2c1)
|
||||
cargo:rustc-check-cfg=cfg(soc_has_i2s0)
|
||||
cargo:rustc-check-cfg=cfg(soc_has_i2s1)
|
||||
cargo:rustc-check-cfg=cfg(soc_has_io_mux)
|
||||
cargo:rustc-check-cfg=cfg(soc_has_ledc)
|
||||
cargo:rustc-check-cfg=cfg(soc_has_mcpwm0)
|
||||
cargo:rustc-check-cfg=cfg(soc_has_mcpwm1)
|
||||
cargo:rustc-check-cfg=cfg(soc_has_nrx)
|
||||
cargo:rustc-check-cfg=cfg(soc_has_pcnt)
|
||||
cargo:rustc-check-cfg=cfg(soc_has_rmt)
|
||||
cargo:rustc-check-cfg=cfg(soc_has_rng)
|
||||
cargo:rustc-check-cfg=cfg(soc_has_rsa)
|
||||
cargo:rustc-check-cfg=cfg(soc_has_lpwr)
|
||||
cargo:rustc-check-cfg=cfg(soc_has_rtc_i2c)
|
||||
cargo:rustc-check-cfg=cfg(soc_has_rtc_io)
|
||||
cargo:rustc-check-cfg=cfg(soc_has_sdhost)
|
||||
cargo:rustc-check-cfg=cfg(soc_has_sens)
|
||||
cargo:rustc-check-cfg=cfg(soc_has_sha)
|
||||
cargo:rustc-check-cfg=cfg(soc_has_slc)
|
||||
cargo:rustc-check-cfg=cfg(soc_has_slchost)
|
||||
cargo:rustc-check-cfg=cfg(soc_has_spi0)
|
||||
cargo:rustc-check-cfg=cfg(soc_has_spi1)
|
||||
cargo:rustc-check-cfg=cfg(soc_has_spi2)
|
||||
cargo:rustc-check-cfg=cfg(soc_has_spi3)
|
||||
cargo:rustc-check-cfg=cfg(soc_has_timg0)
|
||||
cargo:rustc-check-cfg=cfg(soc_has_timg1)
|
||||
cargo:rustc-check-cfg=cfg(soc_has_twai0)
|
||||
cargo:rustc-check-cfg=cfg(soc_has_uart0)
|
||||
cargo:rustc-check-cfg=cfg(soc_has_uart1)
|
||||
cargo:rustc-check-cfg=cfg(soc_has_uart2)
|
||||
cargo:rustc-check-cfg=cfg(soc_has_uhci0)
|
||||
cargo:rustc-check-cfg=cfg(soc_has_uhci1)
|
||||
cargo:rustc-check-cfg=cfg(soc_has_wifi)
|
||||
cargo:rustc-check-cfg=cfg(soc_has_dma_spi2)
|
||||
cargo:rustc-check-cfg=cfg(soc_has_dma_spi3)
|
||||
cargo:rustc-check-cfg=cfg(soc_has_dma_i2s0)
|
||||
cargo:rustc-check-cfg=cfg(soc_has_dma_i2s1)
|
||||
cargo:rustc-check-cfg=cfg(soc_has_adc1)
|
||||
cargo:rustc-check-cfg=cfg(soc_has_adc2)
|
||||
cargo:rustc-check-cfg=cfg(soc_has_bt)
|
||||
cargo:rustc-check-cfg=cfg(soc_has_cpu_ctrl)
|
||||
cargo:rustc-check-cfg=cfg(soc_has_dac1)
|
||||
cargo:rustc-check-cfg=cfg(soc_has_dac2)
|
||||
cargo:rustc-check-cfg=cfg(soc_has_flash)
|
||||
cargo:rustc-check-cfg=cfg(soc_has_psram)
|
||||
cargo:rustc-check-cfg=cfg(soc_has_sw_interrupt)
|
||||
cargo:rustc-check-cfg=cfg(soc_has_touch)
|
||||
cargo:rustc-check-cfg=cfg(pdma)
|
||||
cargo:rustc-check-cfg=cfg(phy)
|
||||
cargo:rustc-check-cfg=cfg(psram)
|
||||
cargo:rustc-check-cfg=cfg(touch)
|
||||
cargo:rustc-check-cfg=cfg(rom_crc_le)
|
||||
cargo:rustc-check-cfg=cfg(rom_crc_be)
|
||||
cargo:rustc-check-cfg=cfg(rom_md5_bsd)
|
||||
cargo:rustc-check-cfg=cfg(pm_support_ext0_wakeup)
|
||||
cargo:rustc-check-cfg=cfg(pm_support_ext1_wakeup)
|
||||
cargo:rustc-check-cfg=cfg(pm_support_touch_sensor_wakeup)
|
||||
cargo:rustc-check-cfg=cfg(ulp_supported)
|
||||
cargo:rustc-check-cfg=cfg(soc)
|
||||
cargo:rustc-check-cfg=cfg(adc)
|
||||
cargo:rustc-check-cfg=cfg(aes)
|
||||
cargo:rustc-check-cfg=cfg(dac)
|
||||
cargo:rustc-check-cfg=cfg(dma)
|
||||
cargo:rustc-check-cfg=cfg(gpio)
|
||||
cargo:rustc-check-cfg=cfg(i2c_master)
|
||||
cargo:rustc-check-cfg=cfg(i2s)
|
||||
cargo:rustc-check-cfg=cfg(interrupts)
|
||||
cargo:rustc-check-cfg=cfg(io_mux)
|
||||
cargo:rustc-check-cfg=cfg(rgb_display)
|
||||
cargo:rustc-check-cfg=cfg(ledc)
|
||||
cargo:rustc-check-cfg=cfg(mcpwm)
|
||||
cargo:rustc-check-cfg=cfg(pcnt)
|
||||
cargo:rustc-check-cfg=cfg(rmt)
|
||||
cargo:rustc-check-cfg=cfg(rng)
|
||||
cargo:rustc-check-cfg=cfg(rsa)
|
||||
cargo:rustc-check-cfg=cfg(sd_host)
|
||||
cargo:rustc-check-cfg=cfg(sd_slave)
|
||||
cargo:rustc-check-cfg=cfg(sleep)
|
||||
cargo:rustc-check-cfg=cfg(sha)
|
||||
cargo:rustc-check-cfg=cfg(spi_master)
|
||||
cargo:rustc-check-cfg=cfg(spi_slave)
|
||||
cargo:rustc-check-cfg=cfg(temp_sensor)
|
||||
cargo:rustc-check-cfg=cfg(timergroup)
|
||||
cargo:rustc-check-cfg=cfg(twai)
|
||||
cargo:rustc-check-cfg=cfg(uart)
|
||||
cargo:rustc-check-cfg=cfg(ulp_fsm)
|
||||
cargo:rustc-check-cfg=cfg(wifi)
|
||||
cargo:rustc-check-cfg=cfg(bt)
|
||||
cargo:rustc-check-cfg=cfg(adc_adc1)
|
||||
cargo:rustc-check-cfg=cfg(adc_adc2)
|
||||
cargo:rustc-check-cfg=cfg(dac_dac1)
|
||||
cargo:rustc-check-cfg=cfg(dac_dac2)
|
||||
cargo:rustc-check-cfg=cfg(i2c_master_i2c0)
|
||||
cargo:rustc-check-cfg=cfg(i2c_master_i2c1)
|
||||
cargo:rustc-check-cfg=cfg(spi_master_spi2)
|
||||
cargo:rustc-check-cfg=cfg(spi_master_spi3)
|
||||
cargo:rustc-check-cfg=cfg(spi_slave_spi2)
|
||||
cargo:rustc-check-cfg=cfg(spi_slave_spi3)
|
||||
cargo:rustc-check-cfg=cfg(timergroup_timg0)
|
||||
cargo:rustc-check-cfg=cfg(timergroup_timg1)
|
||||
cargo:rustc-check-cfg=cfg(uart_uart0)
|
||||
cargo:rustc-check-cfg=cfg(uart_uart1)
|
||||
cargo:rustc-check-cfg=cfg(uart_uart2)
|
||||
cargo:rustc-check-cfg=cfg(soc_ref_tick_hz_is_set)
|
||||
cargo:rustc-check-cfg=cfg(soc_rc_fast_clk_default_is_set)
|
||||
cargo:rustc-check-cfg=cfg(soc_rc_slow_clock_is_set)
|
||||
cargo:rustc-check-cfg=cfg(has_dram_region)
|
||||
cargo:rustc-check-cfg=cfg(has_dram2_uninit_region)
|
||||
cargo:rustc-check-cfg=cfg(soc_has_multiple_xtal_options)
|
||||
cargo:rustc-check-cfg=cfg(aes_endianness_configurable)
|
||||
cargo:rustc-check-cfg=cfg(gpio_has_bank_1)
|
||||
cargo:rustc-check-cfg=cfg(gpio_remap_iomux_pin_registers)
|
||||
cargo:rustc-check-cfg=cfg(i2c_master_separate_filter_config_registers)
|
||||
cargo:rustc-check-cfg=cfg(i2c_master_i2c0_data_register_ahb_address_is_set)
|
||||
cargo:rustc-check-cfg=cfg(rmt_has_per_channel_clock)
|
||||
cargo:rustc-check-cfg=cfg(rmt_supports_reftick_clock)
|
||||
cargo:rustc-check-cfg=cfg(rmt_supports_apb_clock)
|
||||
cargo:rustc-check-cfg=cfg(timergroup_timg_has_timer1)
|
||||
cargo:rustc-check-cfg=cfg(phy_combo_module)
|
||||
cargo:rustc-check-cfg=cfg(esp32c2)
|
||||
cargo:rustc-check-cfg=cfg(riscv)
|
||||
cargo:rustc-check-cfg=cfg(single_core)
|
||||
cargo:rustc-check-cfg=cfg(soc_has_apb_saradc)
|
||||
cargo:rustc-check-cfg=cfg(soc_has_assist_debug)
|
||||
cargo:rustc-check-cfg=cfg(soc_has_dma)
|
||||
cargo:rustc-check-cfg=cfg(soc_has_ecc)
|
||||
cargo:rustc-check-cfg=cfg(soc_has_extmem)
|
||||
cargo:rustc-check-cfg=cfg(soc_has_i2c_ana_mst)
|
||||
cargo:rustc-check-cfg=cfg(soc_has_interrupt_core0)
|
||||
cargo:rustc-check-cfg=cfg(soc_has_modem_clkrst)
|
||||
cargo:rustc-check-cfg=cfg(soc_has_sensitive)
|
||||
cargo:rustc-check-cfg=cfg(soc_has_systimer)
|
||||
cargo:rustc-check-cfg=cfg(soc_has_xts_aes)
|
||||
cargo:rustc-check-cfg=cfg(soc_has_dma_ch0)
|
||||
cargo:rustc-check-cfg=cfg(soc_has_mem2mem1)
|
||||
cargo:rustc-check-cfg=cfg(soc_has_mem2mem2)
|
||||
cargo:rustc-check-cfg=cfg(soc_has_mem2mem3)
|
||||
cargo:rustc-check-cfg=cfg(soc_has_mem2mem4)
|
||||
cargo:rustc-check-cfg=cfg(soc_has_mem2mem5)
|
||||
cargo:rustc-check-cfg=cfg(soc_has_mem2mem6)
|
||||
cargo:rustc-check-cfg=cfg(soc_has_mem2mem7)
|
||||
cargo:rustc-check-cfg=cfg(soc_has_mem2mem8)
|
||||
cargo:rustc-check-cfg=cfg(gdma)
|
||||
cargo:rustc-check-cfg=cfg(swd)
|
||||
cargo:rustc-check-cfg=cfg(rom_md5_mbedtls)
|
||||
cargo:rustc-check-cfg=cfg(pm_support_wifi_wakeup)
|
||||
cargo:rustc-check-cfg=cfg(pm_support_bt_wakeup)
|
||||
cargo:rustc-check-cfg=cfg(uart_support_wakeup_int)
|
||||
cargo:rustc-check-cfg=cfg(gpio_support_deepsleep_wakeup)
|
||||
cargo:rustc-check-cfg=cfg(assist_debug)
|
||||
cargo:rustc-check-cfg=cfg(ecc)
|
||||
cargo:rustc-check-cfg=cfg(systimer)
|
||||
cargo:rustc-check-cfg=cfg(soc_cpu_has_csr_pc)
|
||||
cargo:rustc-check-cfg=cfg(assist_debug_has_sp_monitor)
|
||||
cargo:rustc-check-cfg=cfg(i2c_master_has_fsm_timeouts)
|
||||
cargo:rustc-check-cfg=cfg(i2c_master_has_hw_bus_clear)
|
||||
cargo:rustc-check-cfg=cfg(i2c_master_has_bus_timeout_enable)
|
||||
cargo:rustc-check-cfg=cfg(i2c_master_has_conf_update)
|
||||
cargo:rustc-check-cfg=cfg(i2c_master_has_arbitration_en)
|
||||
cargo:rustc-check-cfg=cfg(i2c_master_has_tx_fifo_watermark)
|
||||
cargo:rustc-check-cfg=cfg(i2c_master_bus_timeout_is_exponential)
|
||||
cargo:rustc-check-cfg=cfg(sha_dma)
|
||||
cargo:rustc-check-cfg=cfg(timergroup_timg_has_divcnt_rst)
|
||||
cargo:rustc-check-cfg=cfg(timergroup_default_clock_source_is_set)
|
||||
cargo:rustc-check-cfg=cfg(timergroup_default_wdt_clock_source_is_set)
|
||||
cargo:rustc-check-cfg=cfg(esp32c3)
|
||||
cargo:rustc-check-cfg=cfg(soc_has_ds)
|
||||
cargo:rustc-check-cfg=cfg(soc_has_fe)
|
||||
cargo:rustc-check-cfg=cfg(soc_has_fe2)
|
||||
cargo:rustc-check-cfg=cfg(soc_has_hmac)
|
||||
cargo:rustc-check-cfg=cfg(soc_has_usb_device)
|
||||
cargo:rustc-check-cfg=cfg(soc_has_dma_ch1)
|
||||
cargo:rustc-check-cfg=cfg(soc_has_dma_ch2)
|
||||
cargo:rustc-check-cfg=cfg(soc_has_tsens)
|
||||
cargo:rustc-check-cfg=cfg(hmac)
|
||||
cargo:rustc-check-cfg=cfg(usb_serial_jtag)
|
||||
cargo:rustc-check-cfg=cfg(aes_dma)
|
||||
cargo:rustc-check-cfg=cfg(aes_dma_mode_ecb)
|
||||
cargo:rustc-check-cfg=cfg(aes_dma_mode_cbc)
|
||||
cargo:rustc-check-cfg=cfg(aes_dma_mode_ofb)
|
||||
cargo:rustc-check-cfg=cfg(aes_dma_mode_ctr)
|
||||
cargo:rustc-check-cfg=cfg(aes_dma_mode_cfb8)
|
||||
cargo:rustc-check-cfg=cfg(aes_dma_mode_cfb128)
|
||||
cargo:rustc-check-cfg=cfg(aes_has_split_text_registers)
|
||||
cargo:rustc-check-cfg=cfg(assist_debug_has_region_monitor)
|
||||
cargo:rustc-check-cfg=cfg(rmt_has_tx_immediate_stop)
|
||||
cargo:rustc-check-cfg=cfg(rmt_has_tx_loop_count)
|
||||
cargo:rustc-check-cfg=cfg(rmt_has_tx_carrier_data_only)
|
||||
cargo:rustc-check-cfg=cfg(rmt_has_tx_sync)
|
||||
cargo:rustc-check-cfg=cfg(rmt_has_rx_wrap)
|
||||
cargo:rustc-check-cfg=cfg(rmt_has_rx_demodulation)
|
||||
cargo:rustc-check-cfg=cfg(rmt_supports_none_clock)
|
||||
cargo:rustc-check-cfg=cfg(rmt_supports_rcfast_clock)
|
||||
cargo:rustc-check-cfg=cfg(rmt_supports_xtal_clock)
|
||||
cargo:rustc-check-cfg=cfg(phy_backed_up_digital_register_count_is_set)
|
||||
cargo:rustc-check-cfg=cfg(esp32c6)
|
||||
cargo:rustc-check-cfg=cfg(soc_has_atomic)
|
||||
cargo:rustc-check-cfg=cfg(soc_has_hp_apm)
|
||||
cargo:rustc-check-cfg=cfg(soc_has_hp_sys)
|
||||
cargo:rustc-check-cfg=cfg(soc_has_ieee802154)
|
||||
cargo:rustc-check-cfg=cfg(soc_has_intpri)
|
||||
cargo:rustc-check-cfg=cfg(soc_has_lp_ana)
|
||||
cargo:rustc-check-cfg=cfg(soc_has_lp_aon)
|
||||
cargo:rustc-check-cfg=cfg(soc_has_lp_apm)
|
||||
cargo:rustc-check-cfg=cfg(soc_has_lp_apm0)
|
||||
cargo:rustc-check-cfg=cfg(soc_has_lp_clkrst)
|
||||
cargo:rustc-check-cfg=cfg(soc_has_lp_i2c0)
|
||||
cargo:rustc-check-cfg=cfg(soc_has_lp_i2c_ana_mst)
|
||||
cargo:rustc-check-cfg=cfg(soc_has_lp_io)
|
||||
cargo:rustc-check-cfg=cfg(soc_has_lp_peri)
|
||||
cargo:rustc-check-cfg=cfg(soc_has_lp_tee)
|
||||
cargo:rustc-check-cfg=cfg(soc_has_lp_timer)
|
||||
cargo:rustc-check-cfg=cfg(soc_has_lp_uart)
|
||||
cargo:rustc-check-cfg=cfg(soc_has_lp_wdt)
|
||||
cargo:rustc-check-cfg=cfg(soc_has_mem_monitor)
|
||||
cargo:rustc-check-cfg=cfg(soc_has_modem_lpcon)
|
||||
cargo:rustc-check-cfg=cfg(soc_has_modem_syscon)
|
||||
cargo:rustc-check-cfg=cfg(soc_has_otp_debug)
|
||||
cargo:rustc-check-cfg=cfg(soc_has_parl_io)
|
||||
cargo:rustc-check-cfg=cfg(soc_has_pau)
|
||||
cargo:rustc-check-cfg=cfg(soc_has_pcr)
|
||||
cargo:rustc-check-cfg=cfg(soc_has_plic_mx)
|
||||
cargo:rustc-check-cfg=cfg(soc_has_pmu)
|
||||
cargo:rustc-check-cfg=cfg(soc_has_etm)
|
||||
cargo:rustc-check-cfg=cfg(soc_has_tee)
|
||||
cargo:rustc-check-cfg=cfg(soc_has_trace0)
|
||||
cargo:rustc-check-cfg=cfg(soc_has_twai1)
|
||||
cargo:rustc-check-cfg=cfg(soc_has_lp_core)
|
||||
cargo:rustc-check-cfg=cfg(soc_has_mem2mem10)
|
||||
cargo:rustc-check-cfg=cfg(soc_has_mem2mem11)
|
||||
cargo:rustc-check-cfg=cfg(soc_has_mem2mem12)
|
||||
cargo:rustc-check-cfg=cfg(soc_has_mem2mem13)
|
||||
cargo:rustc-check-cfg=cfg(soc_has_mem2mem14)
|
||||
cargo:rustc-check-cfg=cfg(soc_has_mem2mem15)
|
||||
cargo:rustc-check-cfg=cfg(plic)
|
||||
cargo:rustc-check-cfg=cfg(lp_core)
|
||||
cargo:rustc-check-cfg=cfg(pm_support_beacon_wakeup)
|
||||
cargo:rustc-check-cfg=cfg(etm)
|
||||
cargo:rustc-check-cfg=cfg(lp_i2c_master)
|
||||
cargo:rustc-check-cfg=cfg(parl_io)
|
||||
cargo:rustc-check-cfg=cfg(lp_uart)
|
||||
cargo:rustc-check-cfg=cfg(ulp_riscv)
|
||||
cargo:rustc-check-cfg=cfg(ieee802154)
|
||||
cargo:rustc-check-cfg=cfg(soc_cpu_has_prv_mode)
|
||||
cargo:rustc-check-cfg=cfg(i2c_master_can_estimate_nack_reason)
|
||||
cargo:rustc-check-cfg=cfg(i2c_master_has_reliable_fsm_reset)
|
||||
cargo:rustc-check-cfg=cfg(rmt_has_tx_loop_auto_stop)
|
||||
cargo:rustc-check-cfg=cfg(rmt_supports_pll80mhz_clock)
|
||||
cargo:rustc-check-cfg=cfg(uart_peripheral_controls_mem_clk)
|
||||
cargo:rustc-check-cfg=cfg(wifi_has_wifi6)
|
||||
cargo:rustc-check-cfg=cfg(esp32h2)
|
||||
cargo:rustc-check-cfg=cfg(esp32s2)
|
||||
cargo:rustc-check-cfg=cfg(soc_has_dedicated_gpio)
|
||||
cargo:rustc-check-cfg=cfg(soc_has_pms)
|
||||
cargo:rustc-check-cfg=cfg(soc_has_syscon)
|
||||
cargo:rustc-check-cfg=cfg(soc_has_usb0)
|
||||
cargo:rustc-check-cfg=cfg(soc_has_usb_wrap)
|
||||
cargo:rustc-check-cfg=cfg(soc_has_dma_crypto)
|
||||
cargo:rustc-check-cfg=cfg(soc_has_dma_copy)
|
||||
cargo:rustc-check-cfg=cfg(soc_has_ulp_riscv_core)
|
||||
cargo:rustc-check-cfg=cfg(psram_dma)
|
||||
cargo:rustc-check-cfg=cfg(ulp_riscv_core)
|
||||
cargo:rustc-check-cfg=cfg(soc_has_copy_dma)
|
||||
cargo:rustc-check-cfg=cfg(soc_has_crypto_dma)
|
||||
cargo:rustc-check-cfg=cfg(riscv_coproc_supported)
|
||||
cargo:rustc-check-cfg=cfg(usb_otg)
|
||||
cargo:rustc-check-cfg=cfg(aes_dma_mode_gcm)
|
||||
cargo:rustc-check-cfg=cfg(spi_master_has_octal)
|
||||
cargo:rustc-check-cfg=cfg(esp32s3)
|
||||
cargo:rustc-check-cfg=cfg(soc_has_interrupt_core1)
|
||||
cargo:rustc-check-cfg=cfg(soc_has_lcd_cam)
|
||||
cargo:rustc-check-cfg=cfg(soc_has_peri_backup)
|
||||
cargo:rustc-check-cfg=cfg(soc_has_rtc_cntl)
|
||||
cargo:rustc-check-cfg=cfg(soc_has_wcl)
|
||||
cargo:rustc-check-cfg=cfg(soc_has_dma_ch3)
|
||||
cargo:rustc-check-cfg=cfg(soc_has_dma_ch4)
|
||||
cargo:rustc-check-cfg=cfg(octal_psram)
|
||||
cargo:rustc-check-cfg=cfg(camera)
|
||||
cargo:rustc-check-cfg=cfg(rmt_has_dma)
|
||||
cargo:rustc-check-cfg=cfg(soc_ref_tick_hz, values("1000000"))
|
||||
cargo:rustc-check-cfg=cfg(soc_rc_fast_clk_default, values("8500000","17500000"))
|
||||
cargo:rustc-check-cfg=cfg(soc_rc_slow_clock, values("150000","136000","90000"))
|
||||
cargo:rustc-check-cfg=cfg(gpio_gpio_function, values("2","1"))
|
||||
cargo:rustc-check-cfg=cfg(gpio_constant_0_input, values("48","31","60"))
|
||||
cargo:rustc-check-cfg=cfg(gpio_constant_1_input, values("56","30"))
|
||||
cargo:rustc-check-cfg=cfg(gpio_func_in_sel_offset, values("0"))
|
||||
cargo:rustc-check-cfg=cfg(gpio_input_signal_max, values("206","100","124","242","255"))
|
||||
cargo:rustc-check-cfg=cfg(gpio_output_signal_max, values("256","128"))
|
||||
cargo:rustc-check-cfg=cfg(i2c_master_i2c0_data_register_ahb_address, values("1610690588"))
|
||||
cargo:rustc-check-cfg=cfg(i2c_master_max_bus_timeout, values("1048575","31","16777215"))
|
||||
cargo:rustc-check-cfg=cfg(i2c_master_ll_intr_mask, values("262143","131071"))
|
||||
cargo:rustc-check-cfg=cfg(i2c_master_fifo_size, values("32","16"))
|
||||
cargo:rustc-check-cfg=cfg(interrupts_status_registers, values("3","2","4"))
|
||||
cargo:rustc-check-cfg=cfg(rmt_ram_start, values("1073047552","1610703872","1610638336","1610642432","1061250048","1610704896"))
|
||||
cargo:rustc-check-cfg=cfg(rmt_channel_ram_size, values("64","48"))
|
||||
cargo:rustc-check-cfg=cfg(rng_apb_cycle_wait_num, values("16"))
|
||||
cargo:rustc-check-cfg=cfg(rsa_size_increment, values("512","32"))
|
||||
cargo:rustc-check-cfg=cfg(rsa_memory_size_bytes, values("512","384"))
|
||||
cargo:rustc-check-cfg=cfg(uart_ram_size, values("128"))
|
||||
cargo:rustc-check-cfg=cfg(bt_controller, values("btdm","npl"))
|
||||
cargo:rustc-check-cfg=cfg(timergroup_default_clock_source, values("0","1","2"))
|
||||
cargo:rustc-check-cfg=cfg(timergroup_default_wdt_clock_source, values("0","1","2"))
|
||||
cargo:rustc-check-cfg=cfg(soc_xtal_frequency, values("40","32"))
|
||||
cargo:rustc-check-cfg=cfg(phy_backed_up_digital_register_count, values("21"))
|
||||
cargo:rustc-check-cfg=cfg(lp_i2c_master_fifo_size, values("16"))
|
||||
cargo:rustc-check-cfg=cfg(lp_uart_ram_size, values("32"))
|
||||
cargo:rustc-cfg=esp32s3
|
||||
cargo:rustc-cfg=xtensa
|
||||
cargo:rustc-cfg=multi_core
|
||||
cargo:rustc-cfg=soc_has_aes
|
||||
cargo:rustc-cfg=soc_has_apb_ctrl
|
||||
cargo:rustc-cfg=soc_has_apb_saradc
|
||||
cargo:rustc-cfg=soc_has_assist_debug
|
||||
cargo:rustc-cfg=soc_has_dma
|
||||
cargo:rustc-cfg=soc_has_ds
|
||||
cargo:rustc-cfg=soc_has_efuse
|
||||
cargo:rustc-cfg=soc_has_extmem
|
||||
cargo:rustc-cfg=soc_has_gpio
|
||||
cargo:rustc-cfg=soc_has_gpio_sd
|
||||
cargo:rustc-cfg=soc_has_hmac
|
||||
cargo:rustc-cfg=soc_has_i2c0
|
||||
cargo:rustc-cfg=soc_has_i2c1
|
||||
cargo:rustc-cfg=soc_has_i2s0
|
||||
cargo:rustc-cfg=soc_has_i2s1
|
||||
cargo:rustc-cfg=soc_has_interrupt_core0
|
||||
cargo:rustc-cfg=soc_has_interrupt_core1
|
||||
cargo:rustc-cfg=soc_has_io_mux
|
||||
cargo:rustc-cfg=soc_has_lcd_cam
|
||||
cargo:rustc-cfg=soc_has_ledc
|
||||
cargo:rustc-cfg=soc_has_lpwr
|
||||
cargo:rustc-cfg=soc_has_mcpwm0
|
||||
cargo:rustc-cfg=soc_has_mcpwm1
|
||||
cargo:rustc-cfg=soc_has_pcnt
|
||||
cargo:rustc-cfg=soc_has_peri_backup
|
||||
cargo:rustc-cfg=soc_has_rmt
|
||||
cargo:rustc-cfg=soc_has_rng
|
||||
cargo:rustc-cfg=soc_has_rsa
|
||||
cargo:rustc-cfg=soc_has_rtc_cntl
|
||||
cargo:rustc-cfg=soc_has_rtc_i2c
|
||||
cargo:rustc-cfg=soc_has_rtc_io
|
||||
cargo:rustc-cfg=soc_has_sdhost
|
||||
cargo:rustc-cfg=soc_has_sens
|
||||
cargo:rustc-cfg=soc_has_sensitive
|
||||
cargo:rustc-cfg=soc_has_sha
|
||||
cargo:rustc-cfg=soc_has_spi0
|
||||
cargo:rustc-cfg=soc_has_spi1
|
||||
cargo:rustc-cfg=soc_has_spi2
|
||||
cargo:rustc-cfg=soc_has_spi3
|
||||
cargo:rustc-cfg=soc_has_system
|
||||
cargo:rustc-cfg=soc_has_systimer
|
||||
cargo:rustc-cfg=soc_has_timg0
|
||||
cargo:rustc-cfg=soc_has_timg1
|
||||
cargo:rustc-cfg=soc_has_twai0
|
||||
cargo:rustc-cfg=soc_has_uart0
|
||||
cargo:rustc-cfg=soc_has_uart1
|
||||
cargo:rustc-cfg=soc_has_uart2
|
||||
cargo:rustc-cfg=soc_has_uhci0
|
||||
cargo:rustc-cfg=soc_has_usb0
|
||||
cargo:rustc-cfg=soc_has_usb_device
|
||||
cargo:rustc-cfg=soc_has_usb_wrap
|
||||
cargo:rustc-cfg=soc_has_wcl
|
||||
cargo:rustc-cfg=soc_has_xts_aes
|
||||
cargo:rustc-cfg=soc_has_dma_ch0
|
||||
cargo:rustc-cfg=soc_has_dma_ch1
|
||||
cargo:rustc-cfg=soc_has_dma_ch2
|
||||
cargo:rustc-cfg=soc_has_dma_ch3
|
||||
cargo:rustc-cfg=soc_has_dma_ch4
|
||||
cargo:rustc-cfg=soc_has_adc1
|
||||
cargo:rustc-cfg=soc_has_adc2
|
||||
cargo:rustc-cfg=soc_has_bt
|
||||
cargo:rustc-cfg=soc_has_cpu_ctrl
|
||||
cargo:rustc-cfg=soc_has_flash
|
||||
cargo:rustc-cfg=soc_has_psram
|
||||
cargo:rustc-cfg=soc_has_sw_interrupt
|
||||
cargo:rustc-cfg=soc_has_ulp_riscv_core
|
||||
cargo:rustc-cfg=soc_has_wifi
|
||||
cargo:rustc-cfg=gdma
|
||||
cargo:rustc-cfg=phy
|
||||
cargo:rustc-cfg=psram
|
||||
cargo:rustc-cfg=psram_dma
|
||||
cargo:rustc-cfg=octal_psram
|
||||
cargo:rustc-cfg=swd
|
||||
cargo:rustc-cfg=ulp_riscv_core
|
||||
cargo:rustc-cfg=rom_crc_le
|
||||
cargo:rustc-cfg=rom_crc_be
|
||||
cargo:rustc-cfg=rom_md5_bsd
|
||||
cargo:rustc-cfg=pm_support_ext0_wakeup
|
||||
cargo:rustc-cfg=pm_support_ext1_wakeup
|
||||
cargo:rustc-cfg=pm_support_touch_sensor_wakeup
|
||||
cargo:rustc-cfg=pm_support_wifi_wakeup
|
||||
cargo:rustc-cfg=pm_support_bt_wakeup
|
||||
cargo:rustc-cfg=uart_support_wakeup_int
|
||||
cargo:rustc-cfg=ulp_supported
|
||||
cargo:rustc-cfg=riscv_coproc_supported
|
||||
cargo:rustc-cfg=soc
|
||||
cargo:rustc-cfg=adc
|
||||
cargo:rustc-cfg=aes
|
||||
cargo:rustc-cfg=assist_debug
|
||||
cargo:rustc-cfg=dma
|
||||
cargo:rustc-cfg=gpio
|
||||
cargo:rustc-cfg=hmac
|
||||
cargo:rustc-cfg=i2c_master
|
||||
cargo:rustc-cfg=i2s
|
||||
cargo:rustc-cfg=interrupts
|
||||
cargo:rustc-cfg=io_mux
|
||||
cargo:rustc-cfg=camera
|
||||
cargo:rustc-cfg=rgb_display
|
||||
cargo:rustc-cfg=ledc
|
||||
cargo:rustc-cfg=mcpwm
|
||||
cargo:rustc-cfg=pcnt
|
||||
cargo:rustc-cfg=psram
|
||||
cargo:rustc-cfg=rmt
|
||||
cargo:rustc-cfg=rng
|
||||
cargo:rustc-cfg=rsa
|
||||
cargo:rustc-cfg=sd_host
|
||||
cargo:rustc-cfg=sleep
|
||||
cargo:rustc-cfg=sha
|
||||
cargo:rustc-cfg=spi_master
|
||||
cargo:rustc-cfg=spi_slave
|
||||
cargo:rustc-cfg=systimer
|
||||
cargo:rustc-cfg=temp_sensor
|
||||
cargo:rustc-cfg=timergroup
|
||||
cargo:rustc-cfg=twai
|
||||
cargo:rustc-cfg=uart
|
||||
cargo:rustc-cfg=ulp_fsm
|
||||
cargo:rustc-cfg=ulp_riscv
|
||||
cargo:rustc-cfg=usb_otg
|
||||
cargo:rustc-cfg=usb_serial_jtag
|
||||
cargo:rustc-cfg=wifi
|
||||
cargo:rustc-cfg=bt
|
||||
cargo:rustc-cfg=phy
|
||||
cargo:rustc-cfg=adc_adc1
|
||||
cargo:rustc-cfg=adc_adc2
|
||||
cargo:rustc-cfg=i2c_master_i2c0
|
||||
cargo:rustc-cfg=i2c_master_i2c1
|
||||
cargo:rustc-cfg=spi_master_spi2
|
||||
cargo:rustc-cfg=spi_master_spi3
|
||||
cargo:rustc-cfg=spi_slave_spi2
|
||||
cargo:rustc-cfg=spi_slave_spi3
|
||||
cargo:rustc-cfg=timergroup_timg0
|
||||
cargo:rustc-cfg=timergroup_timg1
|
||||
cargo:rustc-cfg=uart_uart0
|
||||
cargo:rustc-cfg=uart_uart1
|
||||
cargo:rustc-cfg=uart_uart2
|
||||
cargo:rustc-cfg=soc_rc_fast_clk_default="17500000"
|
||||
cargo:rustc-cfg=soc_rc_fast_clk_default_is_set
|
||||
cargo:rustc-cfg=soc_rc_slow_clock="136000"
|
||||
cargo:rustc-cfg=soc_rc_slow_clock_is_set
|
||||
cargo:rustc-cfg=has_dram_region
|
||||
cargo:rustc-cfg=has_dram2_uninit_region
|
||||
cargo:rustc-cfg=soc_xtal_frequency="40"
|
||||
cargo:rustc-cfg=aes_dma
|
||||
cargo:rustc-cfg=aes_dma_mode_ecb
|
||||
cargo:rustc-cfg=aes_dma_mode_cbc
|
||||
cargo:rustc-cfg=aes_dma_mode_ofb
|
||||
cargo:rustc-cfg=aes_dma_mode_ctr
|
||||
cargo:rustc-cfg=aes_dma_mode_cfb8
|
||||
cargo:rustc-cfg=aes_dma_mode_cfb128
|
||||
cargo:rustc-cfg=aes_has_split_text_registers
|
||||
cargo:rustc-cfg=assist_debug_has_region_monitor
|
||||
cargo:rustc-cfg=gpio_has_bank_1
|
||||
cargo:rustc-cfg=gpio_gpio_function="1"
|
||||
cargo:rustc-cfg=gpio_constant_0_input="60"
|
||||
cargo:rustc-cfg=gpio_constant_1_input="56"
|
||||
cargo:rustc-cfg=gpio_func_in_sel_offset="0"
|
||||
cargo:rustc-cfg=gpio_input_signal_max="255"
|
||||
cargo:rustc-cfg=gpio_output_signal_max="256"
|
||||
cargo:rustc-cfg=i2c_master_has_fsm_timeouts
|
||||
cargo:rustc-cfg=i2c_master_has_bus_timeout_enable
|
||||
cargo:rustc-cfg=i2c_master_can_estimate_nack_reason
|
||||
cargo:rustc-cfg=i2c_master_has_conf_update
|
||||
cargo:rustc-cfg=i2c_master_has_arbitration_en
|
||||
cargo:rustc-cfg=i2c_master_has_tx_fifo_watermark
|
||||
cargo:rustc-cfg=i2c_master_bus_timeout_is_exponential
|
||||
cargo:rustc-cfg=i2c_master_max_bus_timeout="31"
|
||||
cargo:rustc-cfg=i2c_master_ll_intr_mask="262143"
|
||||
cargo:rustc-cfg=i2c_master_fifo_size="32"
|
||||
cargo:rustc-cfg=interrupts_status_registers="4"
|
||||
cargo:rustc-cfg=rmt_ram_start="1610704896"
|
||||
cargo:rustc-cfg=rmt_channel_ram_size="48"
|
||||
cargo:rustc-cfg=rmt_has_tx_immediate_stop
|
||||
cargo:rustc-cfg=rmt_has_tx_loop_count
|
||||
cargo:rustc-cfg=rmt_has_tx_loop_auto_stop
|
||||
cargo:rustc-cfg=rmt_has_tx_carrier_data_only
|
||||
cargo:rustc-cfg=rmt_has_tx_sync
|
||||
cargo:rustc-cfg=rmt_has_rx_wrap
|
||||
cargo:rustc-cfg=rmt_has_rx_demodulation
|
||||
cargo:rustc-cfg=rmt_has_dma
|
||||
cargo:rustc-cfg=rmt_supports_none_clock
|
||||
cargo:rustc-cfg=rmt_supports_apb_clock
|
||||
cargo:rustc-cfg=rmt_supports_rcfast_clock
|
||||
cargo:rustc-cfg=rmt_supports_xtal_clock
|
||||
cargo:rustc-cfg=rng_apb_cycle_wait_num="16"
|
||||
cargo:rustc-cfg=rsa_size_increment="32"
|
||||
cargo:rustc-cfg=rsa_memory_size_bytes="512"
|
||||
cargo:rustc-cfg=sha_dma
|
||||
cargo:rustc-cfg=spi_master_has_octal
|
||||
cargo:rustc-cfg=timergroup_timg_has_timer1
|
||||
cargo:rustc-cfg=timergroup_default_clock_source="0"
|
||||
cargo:rustc-cfg=timergroup_default_clock_source_is_set
|
||||
cargo:rustc-cfg=uart_ram_size="128"
|
||||
cargo:rustc-cfg=bt_controller="btdm"
|
||||
cargo:rustc-cfg=phy_combo_module
|
||||
cargo:rustc-cfg=phy_backed_up_digital_register_count="21"
|
||||
cargo:rustc-cfg=phy_backed_up_digital_register_count_is_set
|
||||
cargo:rustc-link-search=D:\Projects\trunk\JoyD\ESP32\my_usb_project\rust_app\target\release-debug\build\esp-rom-sys-2c8c4a0cb219512f\out
|
||||
cargo:rerun-if-changed=./ld/esp32s3/libesp_rom_sys.a
|
||||
cargo:rerun-if-changed=./ld/esp32s3/rom\additional.ld
|
||||
cargo:rerun-if-changed=./ld/esp32s3/rom\esp32s3.rom.api.ld
|
||||
cargo:rerun-if-changed=./ld/esp32s3/rom\esp32s3.rom.ble_50.ld
|
||||
cargo:rerun-if-changed=./ld/esp32s3/rom\esp32s3.rom.ble_cca.ld
|
||||
cargo:rerun-if-changed=./ld/esp32s3/rom\esp32s3.rom.ble_dtm.ld
|
||||
cargo:rerun-if-changed=./ld/esp32s3/rom\esp32s3.rom.ble_master.ld
|
||||
cargo:rerun-if-changed=./ld/esp32s3/rom\esp32s3.rom.ble_scan.ld
|
||||
cargo:rerun-if-changed=./ld/esp32s3/rom\esp32s3.rom.ble_smp.ld
|
||||
cargo:rerun-if-changed=./ld/esp32s3/rom\esp32s3.rom.ble_test.ld
|
||||
cargo:rerun-if-changed=./ld/esp32s3/rom\esp32s3.rom.bt_funcs.ld
|
||||
cargo:rerun-if-changed=./ld/esp32s3/rom\esp32s3.rom.ld
|
||||
cargo:rerun-if-changed=./ld/esp32s3/rom\esp32s3.rom.libgcc.ld
|
||||
cargo:rerun-if-changed=./ld/esp32s3/rom\esp32s3.rom.version.ld
|
||||
cargo:rerun-if-changed=./ld/esp32s3/rom-functions.x
|
||||
cargo:rerun-if-changed=./libs/esp32s3/unused
|
||||
cargo:rustc-link-lib=esp_rom_sys
|
||||
@@ -0,0 +1 @@
|
||||
D:\Projects\trunk\JoyD\ESP32\my_usb_project\rust_app\target\release-debug\build\esp-rom-sys-2c8c4a0cb219512f\out
|
||||
Binary file not shown.
@@ -0,0 +1,5 @@
|
||||
D:\Projects\trunk\JoyD\ESP32\my_usb_project\rust_app\target\release-debug\build\esp-rom-sys-b781c7c15be4caa5\build_script_build-b781c7c15be4caa5.d: D:\DiskC\ProgramData\Cargo\registry\src\index.crates.io-1949cf8c6b5b557f\esp-rom-sys-0.1.3\build.rs
|
||||
|
||||
D:\Projects\trunk\JoyD\ESP32\my_usb_project\rust_app\target\release-debug\build\esp-rom-sys-b781c7c15be4caa5\build_script_build-b781c7c15be4caa5.exe: D:\DiskC\ProgramData\Cargo\registry\src\index.crates.io-1949cf8c6b5b557f\esp-rom-sys-0.1.3\build.rs
|
||||
|
||||
D:\DiskC\ProgramData\Cargo\registry\src\index.crates.io-1949cf8c6b5b557f\esp-rom-sys-0.1.3\build.rs:
|
||||
Binary file not shown.
Binary file not shown.
@@ -0,0 +1,5 @@
|
||||
D:\Projects\trunk\JoyD\ESP32\my_usb_project\rust_app\target\release-debug\build\esp-sync-1e963d95b45ca796\build_script_build-1e963d95b45ca796.d: D:\DiskC\ProgramData\Cargo\registry\src\index.crates.io-1949cf8c6b5b557f\esp-sync-0.1.1\build.rs
|
||||
|
||||
D:\Projects\trunk\JoyD\ESP32\my_usb_project\rust_app\target\release-debug\build\esp-sync-1e963d95b45ca796\build_script_build-1e963d95b45ca796.exe: D:\DiskC\ProgramData\Cargo\registry\src\index.crates.io-1949cf8c6b5b557f\esp-sync-0.1.1\build.rs
|
||||
|
||||
D:\DiskC\ProgramData\Cargo\registry\src\index.crates.io-1949cf8c6b5b557f\esp-sync-0.1.1\build.rs:
|
||||
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Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user